‘simulation’ Dialect

Target-independent executable SystemVerilog simulation IR

simulation is the SSA and explicit-effect boundary after elaborated SystemVerilog semantic IR. Hierarchy and mutable design objects are identified by deterministic numeric descriptors; code is isolated into function-like SSACFG regions whose only symbolic references are direct sibling calls and process spawns.

Packed builtin integers are exact two-state values and logic values are exact four-state values. Operations preserve the four-state plane unless their contract explicitly performs truth evaluation, conversion to a two-state result, or dynamic-selection fallback. Dynamic selections accept integer and four-state indices: an unknown index reads as X in the logic domain and zero in the bits domain, and suppresses writes and drives. Partially out-of-range selections preserve or update valid positions while reads fill invalid positions with X or zero according to the result domain and writes ignore invalid positions.

Operations

simulation.aggregate.construct (::talos::sim::SimAggregateConstructOp)

Construct a fixed struct or array in declaration order

Syntax:

operation ::= `simulation.aggregate.construct` $elements attr-dict `:` functional-type($elements, $result)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
elements	variadic of any type

Results:

Result	Description
result	any type

simulation.aggregate.default (::talos::sim::SimAggregateDefaultOp)

SystemVerilog default value of a fixed aggregate

Syntax:

operation ::= `simulation.aggregate.default` attr-dict `:` type($result)

Struct and array elements default recursively. Union defaults retain their language-level active-member or tag state; in particular, an unpacked tagged union has no active member and a four-state packed tag is unknown.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	any type

simulation.aggregate.export_bitstream (::talos::sim::SimAggregateExportBitstreamOp)

Pack one fixed unpacked aggregate into a packed bit stream

Syntax:

operation ::= `simulation.aggregate.export_bitstream` $input `plan` $plan attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
plan	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.aggregate.extract (::talos::sim::SimAggregateExtractOp)

Extract one static struct or array subelement

Syntax:

operation ::= `simulation.aggregate.extract` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.aggregate.import_bitstream (::talos::sim::SimAggregateImportBitstreamOp)

Unpack one packed bit stream into a fixed unpacked aggregate

Syntax:

operation ::= `simulation.aggregate.import_bitstream` $input `plan` $plan attr-dict `:` functional-type(operands, results)

Materializes the inverse of aggregate.export_bitstream using the same compact, repeat-aware fixed-layout plan. This keeps construction of large fixed aggregate bit-stream targets proportional to their type description instead of their element count.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
plan	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.aggregate.insert (::talos::sim::SimAggregateInsertOp)

Replace one static struct or array subelement

Syntax:

operation ::= `simulation.aggregate.insert` $replacement `into` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	any type
replacement	any type

Results:

Result	Description
result	any type

simulation.aggregate.splat (::talos::sim::SimAggregateSplatOp)

Fill every element of a fixed array with one value

Syntax:

operation ::= `simulation.aggregate.splat` $input attr-dict `:` functional-type(operands, results)

This is the compact form of a fixed-array assignment pattern whose elements are all the same SSA value. It avoids making compiler memory and instruction count proportional to the declared array length.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.argument_ref.from_managed (::talos::sim::SimArgumentRefFromManagedOp)

Erase a managed property reference into an exact-alias formal

Syntax:

operation ::= `simulation.argument_ref.from_managed` $input attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed managed field reference with an owning object

Results:

Result	Description
result	polymorphic exact-alias subroutine reference

simulation.argument_ref.from_path (::talos::sim::SimArgumentRefFromPathOp)

Erase a managed reference path into an exact-alias formal

Syntax:

operation ::= `simulation.argument_ref.from_path` $input attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	managed escaping dynamic-lvalue path

Results:

Result	Description
result	polymorphic exact-alias subroutine reference

simulation.argument_ref.from_ref (::talos::sim::SimArgumentRefFromRefOp)

Erase an ordinary reference into an exact-alias formal

Syntax:

operation ::= `simulation.argument_ref.from_ref` $input attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed mutable storage handle

Results:

Result	Description
result	polymorphic exact-alias subroutine reference

simulation.argument_ref.load (::talos::sim::SimArgumentRefLoadOp)

Load through an exact-alias subroutine reference

Syntax:

operation ::= `simulation.argument_ref.load` $reference attr-dict `:` qualified(type($reference)) `->` type($result)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
reference	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	any type

simulation.argument_ref.retype (::talos::sim::SimArgumentRefRetypeOp)

View an exact alias through an equivalent packed type

Syntax:

operation ::= `simulation.argument_ref.retype` $input attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Preserves the opaque alias representation while changing only the declared packed element shape. The verifier requires identical packed width and state domain; source signedness equivalence was checked before normalized simulation types were formed.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	polymorphic exact-alias subroutine reference

simulation.argument_ref.store (::talos::sim::SimArgumentRefStoreOp)

Store through an exact-alias subroutine reference

Syntax:

operation ::= `simulation.argument_ref.store` $value `to` $reference attr-dict `:` type($value) `,` qualified(type($reference))

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
value	any type
reference	polymorphic exact-alias subroutine reference

simulation.array.extract_dynamic (::talos::sim::SimArrayDynExtractOp)

Extract from a fixed array using a declared-range index

Syntax:

operation ::= `simulation.array.extract_dynamic` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

The index is interpreted in the array’s preserved source range. Unknown or out-of-range indices produce the element type’s recursive default.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type
index	any type

Results:

Result	Description
result	any type

simulation.array.insert_dynamic (::talos::sim::SimArrayDynInsertOp)

Replace an element of a fixed array using a declared-range index

Syntax:

operation ::= `simulation.array.insert_dynamic` $replacement `into` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

The index is interpreted in the array’s preserved source range. IEEE 1800-2017 7.4.6 makes an unknown or out-of-range index invalid, and “writing to an array with an invalid index shall perform no operation”, so such an index yields the input array unchanged.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type
replacement	any type
index	any type

Results:

Result	Description
result	any type

simulation.assert.action_state (::talos::sim::SimAssertionActionStateOp)

Snapshot assertion pass/fail action enablement

Syntax:

operation ::= `simulation.assert.action_state` $context `assertion` $assertion_id attr-dict

Return the action-enable mask at the start of one assertion attempt. Bit 0 enables nonvacuous pass actions, bit 1 enables vacuous pass actions, and bit 2 enables fail actions. Deferred assertions capture this value so a later assertion-control call cannot change an already executing attempt.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
assertion_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
state	32-bit signless integer

simulation.assert.clock_occurrence.consume (::talos::sim::SimClockOccurrenceConsumeOp)

Consume one finalized multi-clock occurrence cohort

Syntax:

operation ::= `simulation.assert.clock_occurrence.consume` $context `site` $occurrence_site attr-dict

Returns the nonzero bit mask of the oldest finalized clock-occurrence cohort queued for the current logical process and compiler-assigned site. Zero means that no complete cohort remains. Cohorts are finalized only after their producer scheduler wave has ended, so signal publication order cannot expose a partial mask.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
occurrence_site	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
mask	64-bit signless integer

simulation.assert.clocked_sample_read (::talos::sim::SimClockedSampleReadOp)

Read one age from a compiler-planned alternate-clock ring

Syntax:

operation ::= `simulation.assert.clocked_sample_read` $context `id` $id `depth` $depth `age` $age attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
depth	::mlir::IntegerAttr	64-bit signless integer attribute
age	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	any type

simulation.assert.clocked_sample_update (::talos::sim::SimClockedSampleUpdateOp)

Advance one compiler-planned alternate-clock sample ring

Syntax:

operation ::= `simulation.assert.clocked_sample_update` $context `from` $current `gate` $gate `id` $id `depth` $depth attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
depth	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
current	any type
gate	1-bit signless integer

simulation.assert.control (::talos::sim::SimAssertionControlOp)

Change the control state of one assertion identity

Syntax:

operation ::= `simulation.assert.control` $context `action` $action `assertion` $assertion_id attr-dict

Apply one IEEE assertion control action to a compiler-resolved assertion identity. Off preserves existing attempts and deferred reports. Kill advances the assertion generation and cancels pending deferred reports; generated concurrent monitors use that generation to invalidate live work. Action controls affect only attempts that start after the control operation.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
action	::talos::sim::AssertionControlActionAttr	simulation assertion control action
assertion_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

simulation.assert.control.dynamic (::talos::sim::SimAssertionControlDynamicOp)

Dynamically change one assertion identity’s control state

Syntax:

operation ::= `simulation.assert.control.dynamic` $context `action` $action `assertion` $assertion_id attr-dict

Apply an IEEE assertion control action selected at execution time to one compiler-resolved assertion identity. The action has already been checked to be in the range 1 through 11.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
assertion_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
action	32-bit signless integer

simulation.assert.deferred_enqueue (::talos::sim::SimDeferredEnqueueOp)

Enqueue a deferred-immediate assertion report

Syntax:

operation ::= `simulation.assert.deferred_enqueue` $id attr-dict

Record an encounter of one deferred-immediate assertion site in the current logical process and return an opaque report ticket. Each encounter remains independently pending until it matures or the originating process reaches an LRM-defined flush point.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
ticket	64-bit signless integer

simulation.assert.deferred_mature (::talos::sim::SimDeferredMatureOp)

Mature a pending deferred-immediate assertion report

Syntax:

operation ::= `simulation.assert.deferred_mature` $ticket attr-dict `:` type($ticket)

Return true only when the opaque report ticket is still pending for its originating logical process. The ticket is consumed regardless, so callbacks canceled by a process flush or assertion kill become no-ops.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
ticket	64-bit signless integer

Results:

Result	Description
current	1-bit signless integer

simulation.assert.deferred_once (::talos::sim::SimDeferredOnceOp)

Claim one deferred-immediate assertion site in this slot

Syntax:

operation ::= `simulation.assert.deferred_once` $id attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
first	1-bit signless integer

simulation.assert.enabled (::talos::sim::SimAssertionEnabledOp)

Test whether one assertion may start a new attempt

Syntax:

operation ::= `simulation.assert.enabled` $context `assertion` $assertion_id attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
assertion_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
enabled	1-bit signless integer

simulation.assert.kill_epoch (::talos::sim::SimAssertionKillEpochOp)

Read the Kill generation of one assertion identity

Syntax:

operation ::= `simulation.assert.kill_epoch` $context `assertion` $assertion_id attr-dict

Return the generation advanced by every effective Kill action. Concurrent monitors snapshot this value for their live attempts and queued reports; an epoch mismatch cancels work that predates Kill without exposing compiler-owned monitor storage to the runtime.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
assertion_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
epoch	64-bit signless integer

simulation.assert.nochange.update (::talos::sim::SimNoChangeUpdateOp)

Update one static nochange timing-check state

Syntax:

operation ::= `simulation.assert.nochange.update` $context `,` $mask `offsets` `(` $start_offset `,` $end_offset `)` `site` $occurrence_site attr-dict

Records one nonzero ordered occurrence cohort for a static $nochange check. A zero cohort finalizes the numeric simulation slot and returns the number of violations accumulated by the specialized pending-window state.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
occurrence_site	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
mask	64-bit signless integer
start_offset	64-bit signless integer
end_offset	64-bit signless integer

Results:

Result	Description
reports	64-bit signless integer

simulation.assert.sampled_history (::talos::sim::SimSampledHistoryOp)

Read and advance one compiler-assigned sampled-value ring

Syntax:

operation ::= `simulation.assert.sampled_history` $context `from` $current `gate` $gate `id` $id `depth` $depth attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
depth	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
current	any type
gate	1-bit signless integer

Results:

Result	Description
result	any type

simulation.assert.sampled_read (::talos::sim::SimSampledReadOp)

Read a canonical state value from the Preponed snapshot

Syntax:

operation ::= `simulation.assert.sampled_read` $context `from` $source attr-dict `:` functional-type(operands, results)

The source must have a proven canonical descriptor. A dynamic selection snapshots that descriptor’s bounded range and reads the selected packed value at execution time. Sampled expressions must also sample any dynamic selector. An invalid array selection returns the element’s invalid-read value; an unresolved descriptor cannot establish a snapshot footprint.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource}

Operands:

Operand	Description
context	opaque simulator and design context
source	any type

Results:

Result	Description
result	any type

simulation.assoc.create (::talos::sim::SimAssocCreateOp)

Create an empty typed associative array

Syntax:

operation ::= `simulation.assoc.create` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
type_id	::mlir::IntegerAttr	64-bit signless integer attribute
element_kind	::talos::sim::ElementKindAttr	simulation element kind
element_flags	::talos::sim::ElementFlagsAttr	simulation element flags
value_size	::mlir::IntegerAttr	64-bit signless integer attribute
alignment	::mlir::IntegerAttr	64-bit signless integer attribute
bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
trace_offsets	::mlir::DenseI64ArrayAttr	i64 dense array attribute
trace_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute
key_kind	::talos::sim::AssocKeyKindAttr	simulation assoc key kind
key_width	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
result	managed SystemVerilog associative array value

simulation.assoc.delete (::talos::sim::SimAssocDeleteOp)

Delete one associative key

Syntax:

operation ::= `simulation.assoc.delete` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
array	managed SystemVerilog associative array value
key	any type

simulation.assoc.exists (::talos::sim::SimAssocExistsOp)

Test whether an explicit associative entry exists

Syntax:

operation ::= `simulation.assoc.exists` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
array	managed SystemVerilog associative array value
key	any type

Results:

Result	Description
result	1-bit signless integer

simulation.assoc.read (::talos::sim::SimAssocReadOp)

Read an associative entry or its installed default

Syntax:

operation ::= `simulation.assoc.read` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
array	managed SystemVerilog associative array value
key	any type

Results:

Result	Description
result	any type

simulation.assoc.set_default (::talos::sim::SimAssocSetDefaultOp)

Install a hidden assignment-pattern default

Syntax:

operation ::= `simulation.assoc.set_default` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
array	managed SystemVerilog associative array value
value	any type

simulation.assoc.traverse (::talos::sim::SimAssocTraverseOp)

Perform ordered first, last, next, or previous traversal

Syntax:

operation ::= `simulation.assoc.traverse` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
direction	::talos::sim::AssocTraversalDirectionAttr	simulation assoc traversal direction
endpoint	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
array	managed SystemVerilog associative array value
key	any type

Results:

Result	Description
result_key	any type
success	1-bit signless integer

simulation.assoc.write (::talos::sim::SimAssocWriteOp)

Insert or replace an explicit associative entry

Syntax:

operation ::= `simulation.assoc.write` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
array	managed SystemVerilog associative array value
key	any type
value	any type

simulation.bits.dyn_extract (::talos::sim::SimBitsDynExtractOp)

Dynamically select a two-state packed slice

Syntax:

operation ::= `simulation.bits.dyn_extract` $input `from` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index may be a signless builtin integer or four-state logic and its bit pattern is interpreted as a signed two’s-complement value. Producers must therefore zero-extend unsigned source indices before normalization so that a positive index cannot be mistaken for a negative one. An unknown index produces zero. For a partially out-of-range selection, in-range bits are preserved and out-of-range bits are zero. This operation defines bounds behavior without relying on poison-producing integer shifts.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	integer
low_bit	any type

Results:

Result	Description
result	integer

simulation.bits.dyn_insert (::talos::sim::SimBitsDynInsertOp)

Dynamically replace a two-state packed slice

Syntax:

operation ::= `simulation.bits.dyn_insert` $replacement `into` $input `at` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index follows the same signed two’s-complement normalization contract as bits.dyn_extract. An unknown or wholly out-of-range index leaves the input unchanged. A partially overlapping replacement updates only the in-range input bits.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	integer
replacement	integer
low_bit	any type

Results:

Result	Description
result	integer

simulation.box.bind_type (::talos::sim::SimBoxBindTypeOp)

Bind a boxed value’s immutable exact source type descriptor

Syntax:

operation ::= `simulation.box.bind_type` $input `to` $descriptor attr-dict `:` qualified(type($input))

The typed input is the one-element dynamic-array representation before box.pack erases its element type. The descriptor’s normalized value type must match exactly. At runtime, the array must have one element and belong to the executing context. A first binding is immutable; repeating the same binding is permitted and a different binding is rejected. The operation has an explicit heap write effect; box.pack remains a pure identity cast.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
descriptor	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
input	managed SystemVerilog dynamic array value

simulation.box.cast (::talos::sim::SimBoxCastOp)

Recover a checked boxed dynamic-array representation

Syntax:

operation ::= `simulation.box.cast` $input attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	type-erased singular value stored by an untyped mailbox

Results:

Result	Description
result	managed SystemVerilog dynamic array value

simulation.box.is_type (::talos::sim::SimBoxIsTypeOp)

Test the stable element type stored in a boxed value

Syntax:

operation ::= `simulation.box.is_type` $input `type_id` $type_id attr-dict `:` type($input)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
type_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	type-erased singular value stored by an untyped mailbox

Results:

Result	Description
result	1-bit signless integer

simulation.box.pack (::talos::sim::SimBoxPackOp)

Erase a one-element typed dynamic array as a boxed value

Syntax:

operation ::= `simulation.box.pack` $input attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	managed SystemVerilog dynamic array value

Results:

Result	Description
result	type-erased singular value stored by an untyped mailbox

simulation.bytes.constant (::talos::sim::SimBytesConstantOp)

Immutable literal bytes preserved from source

Syntax:

operation ::= `simulation.bytes.constant` $value attr-dict

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
value	::mlir::StringAttr	string attribute

Results:

Result	Description
result	immutable literal byte sequence

simulation.call (::talos::sim::SimCallOp)

Direct call to a sibling zero-time simulation function

Syntax:

operation ::= `simulation.call` $callee `(` $operands `)` attr-dict
              `:` functional-type($operands, $results)

Interfaces: ArgAndResultAttrsOpInterface, CallOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
callee	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
arg_attrs	::mlir::ArrayAttr	Array of dictionary attributes
res_attrs	::mlir::ArrayAttr	Array of dictionary attributes

Operands:

Operand	Description
operands	variadic of any type

Results:

Result	Description
results	variadic of any type

simulation.chandle.equal (::talos::sim::SimChandleEqualOp)

Compare opaque DPI C pointers, including null

Syntax:

operation ::= `simulation.chandle.equal` $lhs `,` $rhs attr-dict `:` type($lhs)

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	nullable opaque DPI C pointer
rhs	nullable opaque DPI C pointer

Results:

Result	Description
equal	1-bit signless integer

simulation.chandle.null (::talos::sim::SimChandleNullOp)

Typed null DPI C pointer

Syntax:

operation ::= `simulation.chandle.null` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	nullable opaque DPI C pointer

simulation.children.disable (::talos::sim::SimDisableChildrenOp)

Recursively cancel all current direct-child subtrees

Syntax:

operation ::= `simulation.children.disable` attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

simulation.class.alloc (::talos::sim::SimClassAllocOp)

Allocate zero-initialized storage for a concrete class

Syntax:

operation ::= `simulation.class.alloc` $context attr-dict `:` type($context) `->` qualified(type($result))

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	nullable statically typed managed class handle

simulation.class.builtin_upcast (::talos::sim::SimClassBuiltinUpcastOp)

Preserve object identity through a built-in base view

Syntax:

operation ::= `simulation.class.builtin_upcast` $object attr-dict `:` qualified(type($object))
              `to` qualified(type($result))

Converts a user class handle to its inherited semaphore or mailbox type. The class declaration’s builtin_base field supplies the exact base type. The result retains the outer object identity, including null; builtin operations resolve the private payload through its class descriptor. This operation never reads or extracts the embedded payload field.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
object	nullable statically typed managed class handle

Results:

Result	Description
result	managed typed SystemVerilog mailbox handle or managed SystemVerilog semaphore handle

simulation.class.cast (::talos::sim::SimClassCastOp)

Checked class or interface cast

Syntax:

operation ::= `simulation.class.cast` $object attr-dict `:` qualified(type($object))
              `to` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
object	nullable statically typed managed class handle or managed typed SystemVerilog mailbox handle or managed SystemVerilog semaphore handle

Results:

Result	Description
result	nullable statically typed managed class handle

simulation.class.copy (::talos::sim::SimClassCopyOp)

Allocate a dynamic-type SystemVerilog shallow class copy

Syntax:

operation ::= `simulation.class.copy` $context `,` $source attr-dict `:`
              type($context) `,` qualified(type($source)) `->` qualified(type($result))

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
source	nullable statically typed managed class handle

Results:

Result	Description
result	nullable statically typed managed class handle

simulation.class.decl (::talos::sim::SimClassDeclOp)

Immutable managed class and hierarchy descriptor

Syntax:

operation ::= `simulation.class.decl` $sym_name `id` $id (`extends` $base^)?
              (`implements` $interfaces^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
base	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
interfaces	::mlir::ArrayAttr	array attribute
weak_referent	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
random_variable_references	::mlir::ArrayAttr	random-variable reference array
random_constraint_template	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
implicit_constructor	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
is_abstract	::mlir::BoolAttr	bool attribute
is_interface	::mlir::BoolAttr	bool attribute
is_final	::mlir::BoolAttr	bool attribute
debug_name	::mlir::StringAttr	string attribute
builtin_base	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.class.direct_call (::talos::sim::SimClassDirectCallOp)

Direct instance method call with explicit receiver

Syntax:

operation ::= `simulation.class.direct_call` $callee $receiver `(` $arguments `)` attr-dict `:`
              functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
callee	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
receiver	nullable statically typed managed class handle
arguments	variadic of any type

Results:

Result	Description
results	variadic of any type

simulation.class.dispatch_targets (::talos::sim::SimClassDispatchTargetsOp)

Retain compatible closed-world virtual dispatch targets

Syntax:

operation ::= `simulation.class.dispatch_targets` $targets attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
targets	::mlir::ArrayAttr	symbol ref array attribute

simulation.class.field (::talos::sim::SimClassFieldDeclOp)

Declaration-order class property and trace descriptor

Syntax:

operation ::= `simulation.class.field` $sym_name `of` $owner `at` $ordinal (`offset` $offset^)?
              `:` $type attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
type	::mlir::TypeAttr	any type attribute
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
offset	::mlir::IntegerAttr	64-bit signless integer attribute
is_static	::mlir::BoolAttr	bool attribute
is_weak	::mlir::BoolAttr	bool attribute
debug_name	::mlir::StringAttr	string attribute

simulation.class.field_ref (::talos::sim::SimClassFieldRefOp)

Managed reference to one instance property

Syntax:

operation ::= `simulation.class.field_ref` $object `[` $field `]` attr-dict `:` qualified(type($object))
              `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
field	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
object	nullable statically typed managed class handle

Results:

Result	Description
result	typed managed field reference with an owning object

simulation.class.id (::talos::sim::SimClassIdOp)

Return the stable identity of a managed object

Syntax:

operation ::= `simulation.class.id` $object attr-dict `:` qualified(type($object))

Returns zero for a null handle and a nonzero identity that is stable for the lifetime of every allocated object. This implements weak_reference::get_id without exposing a native address.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
object	nullable statically typed managed class handle

Results:

Result	Description
result	64-bit signless integer

simulation.class.is_instance (::talos::sim::SimClassIsInstanceOp)

Test a dynamic class against a class or interface

Syntax:

operation ::= `simulation.class.is_instance` $object `is` $target attr-dict `:` qualified(type($object))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
target	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
object	nullable statically typed managed class handle or managed typed SystemVerilog mailbox handle or managed SystemVerilog semaphore handle

Results:

Result	Description
result	1-bit signless integer

simulation.class.method (::talos::sim::SimClassMethodDeclOp)

Class method signature and deterministic dispatch slot

Syntax:

operation ::= `simulation.class.method` $sym_name `of` $owner (`slot` $slot^)?
              (`signature_id` $signature_id^)?
              (`interface_ordinal` $interface_ordinal^)?
              (`implemented_by` $implementation^)? `:` $function_type attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
function_type	::mlir::TypeAttr	any type attribute
slot	::mlir::IntegerAttr	64-bit signless integer attribute
signature_id	::mlir::IntegerAttr	64-bit signless integer attribute
interface_ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
implementation	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
is_virtual	::mlir::BoolAttr	bool attribute
is_pure	::mlir::BoolAttr	bool attribute
is_static	::mlir::BoolAttr	bool attribute
is_task	::mlir::BoolAttr	bool attribute
is_final	::mlir::BoolAttr	bool attribute
debug_name	::mlir::StringAttr	string attribute

simulation.class.null (::talos::sim::SimClassNullOp)

Typed null managed class handle

Syntax:

operation ::= `simulation.class.null` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	nullable statically typed managed class handle

simulation.class.root_bind (::talos::sim::SimClassRootBindOp)

Bind a managed SSA handle to a pre-registered root slot

Syntax:

operation ::= `simulation.class.root_bind` $object `to` $slot `at` $bit_offset $mode `kinds` $kind_mask attr-dict `:` qualified(type($object)) `,` type($slot)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
bit_offset	::mlir::IntegerAttr	64-bit signless integer attribute
mode	::talos::sim::ManagedRootModeAttr	managed root classification
kind_mask	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
object	any type
slot	any type

simulation.class.virtual_call (::talos::sim::SimClassVirtualCallOp)

Descriptor-table class or interface dispatch

Syntax:

operation ::= `simulation.class.virtual_call` $receiver `[` $method `]` `slot` $slot `signature_id` $signature_id
              `(` $arguments `)` attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
method	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
slot	::mlir::IntegerAttr	64-bit signless integer attribute
signature_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
receiver	nullable statically typed managed class handle
arguments	variadic of any type

Results:

Result	Description
results	variadic of any type

simulation.class.virtual_task_call (::talos::sim::SimClassVirtualTaskCallOp)

Descriptor-dispatched virtual class task activation

Syntax:

operation ::= `simulation.class.virtual_task_call` $receiver `[` $method `]` `slot` $slot
              `signature_id` $signature_id
              `(` $values `)` `arguments` $argument_count `to` $continuation
              attr-dict `:` functional-type(operands, results)

Resolves a virtual task through the receiver’s managed class descriptor, then transfers the current logical process into the selected task activation. The receiver and explicit argument prefix initialize the method inputs after the implicit caller context; remaining values are forwarded to the continuation.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
method	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
slot	::mlir::IntegerAttr	64-bit signless integer attribute
signature_id	::mlir::IntegerAttr	64-bit signless integer attribute
argument_count	::mlir::IntegerAttr	64-bit signless integer attribute
site	::talos::schedule::ContinuationSiteAttr

Operands:

Operand	Description
receiver	nullable statically typed managed class handle
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.clocking_output.current (::talos::sim::SimClockingOutputCurrentOp)

Test for a matching clocking-output event in this time slot

Syntax:

operation ::= `simulation.clocking_output.current` $edge $clock `width` $width `descriptor` $descriptor attr-dict `:` type($clock)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
edge	::talos::sim::EdgeKindAttr	suspension edge kind
width	::mlir::IntegerAttr	64-bit signless integer attribute
descriptor	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
clock	any type

Results:

Result	Description
current	1-bit signless integer

simulation.clocking_output.track (::talos::sim::SimClockingOutputTrackOp)

Track one static clocking-output event from time zero

Syntax:

operation ::= `simulation.clocking_output.track` $edge $clock `width` $width attr-dict `:` type($clock)

Register a statically bound clock and edge before design processes begin. The runtime retains only the most recent matching numeric time, allowing a zero-skew clocking output issued later in the same time slot to use the current clocking event instead of waiting one cycle.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
edge	::talos::sim::EdgeKindAttr	suspension edge kind
width	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
clock	any type

simulation.code_unit.decl (::talos::sim::SimCodeUnitDeclOp)

Immutable process or zero-time function inventory record

Syntax:

operation ::= `simulation.code_unit.decl` $id `in` $scope_id $code_unit_kind
              `hierarchy` $hierarchical_name (`debug` $debug_name^)? attr-dict

Retains the elaborated identity and lexical hierarchy of a code unit even when IPO erases its executable simulation.func. The ID is stable across compilation modes and is also the runtime process handle ID. Entry kinds without a source-level VPI object are intrinsically internal. The optional internal marker additionally hides a normally source-visible entry kind.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
code_unit_kind	::talos::sim::EntryKindAttr	simulation code-unit kind
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
internal	::mlir::UnitAttr	unit attribute

simulation.container.clone (::talos::sim::SimContainerCloneOp)

Deep-clone a dynamic array or queue value

Syntax:

operation ::= `simulation.container.clone` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.container.create (::talos::sim::SimContainerCreateOp)

Create a sequential container from stable type metadata

Syntax:

operation ::= `simulation.container.create` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
type_id	::mlir::IntegerAttr	64-bit signless integer attribute
element_kind	::talos::sim::ElementKindAttr	simulation element kind
element_flags	::talos::sim::ElementFlagsAttr	simulation element flags
value_size	::mlir::IntegerAttr	64-bit signless integer attribute
alignment	::mlir::IntegerAttr	64-bit signless integer attribute
bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
trace_offsets	::mlir::DenseI64ArrayAttr	i64 dense array attribute
trace_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute
container_kind	::talos::sim::ContainerKindAttr	simulation container kind
bound	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
size	64-bit signless integer

Results:

Result	Description
result	any type

simulation.container.create_like (::talos::sim::SimContainerCreateLikeOp)

Create a sequential container with matching typed metadata

Syntax:

operation ::= `simulation.container.create_like` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
preferred	any type
fallback	any type
size	64-bit signless integer

Results:

Result	Description
result	any type

simulation.container.delete (::talos::sim::SimContainerDeleteOp)

Clear a dynamic array or queue

Syntax:

operation ::= `simulation.container.delete` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type

simulation.container.export_bitstream (::talos::sim::SimContainerExportBitstreamOp)

Pack leading dynamic-container elements into a fixed bit-stream

Syntax:

operation ::= `simulation.container.export_bitstream` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type

Results:

Result	Description
result	any type

simulation.container.export_fixed (::talos::sim::SimContainerExportFixedOp)

Bulk-copy a dynamic container into one fixed unpacked array

Syntax:

operation ::= `simulation.container.export_fixed` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
element_span	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
container	any type

Results:

Result	Description
result	fixed-size unpacked array with its declared source range

simulation.container.import_fixed (::talos::sim::SimContainerImportFixedOp)

Bulk-copy one fixed unpacked array into a dynamic container

Syntax:

operation ::= `simulation.container.import_fixed` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
element_span	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
container	any type
input	fixed-size unpacked array with its declared source range

simulation.container.read (::talos::sim::SimContainerReadOp)

Typed read from a dynamic array or queue

Syntax:

operation ::= `simulation.container.read` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type
index	64-bit signless integer

Results:

Result	Description
result	any type

simulation.container.size (::talos::sim::SimContainerSizeOp)

Return the live size of a dynamic array or queue

Syntax:

operation ::= `simulation.container.size` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type

Results:

Result	Description
result	64-bit signless integer

simulation.container.swap (::talos::sim::SimContainerSwapOp)

Swap two sequential-container elements and their identities

Syntax:

operation ::= `simulation.container.swap` $container `[` $left `,` $right `]` attr-dict `:` type($container)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type
left	64-bit signless integer
right	64-bit signless integer

simulation.container.write (::talos::sim::SimContainerWriteOp)

Typed write to a dynamic array or queue

Syntax:

operation ::= `simulation.container.write` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
container	any type
index	64-bit signless integer
value	any type

simulation.context.driver (::talos::sim::SimContextDriverOp)

Syntax:

operation ::= `simulation.context.driver` $context `[` $id `]` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	typed static net-driver handle

simulation.context.event (::talos::sim::SimContextEventOp)

Syntax:

operation ::= `simulation.context.event` $context `[` $id `]` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	opaque scheduler event handle

simulation.context.net (::talos::sim::SimContextNetOp)

Syntax:

operation ::= `simulation.context.net` $context `[` $id `]` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	typed resolved net handle

simulation.context.runtime (::talos::sim::SimContextRuntimeOp)

Project a simulation context to its runtime context

Syntax:

operation ::= `simulation.context.runtime` $context attr-dict `:` type($context)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
context	any type

Results:

Result	Description
result	typed reference to an in-tree runtime ABI object

simulation.context.storage (::talos::sim::SimContextStorageOp)

Syntax:

operation ::= `simulation.context.storage` $context `[` $id `]` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	typed mutable storage handle

simulation.control.boundary (::talos::sim::SimControlBoundaryOp)

Register the resumable exit of a named block activation

Syntax:

operation ::= `simulation.control.boundary` $activation `resume` $resume
              (`(` $resume_operands^ `:` type($resume_operands) `)`)?
              `body` $body attr-dict

The resume successor is the block exit used when another logical process disables this activation. Its operands are checkpointed in the canonical process frame. Ordinary execution registers that continuation and follows the body successor without yielding to the scheduler.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr

Operands:

Operand	Description
activation	opaque dynamic named-control activation token
resume_operands	variadic of any type

Successors:

Successor	Description
resume	any successor
body	any successor

simulation.control.disable (::talos::sim::SimControlDisableOp)

Disable resolved named block activations

Syntax:

operation ::= `simulation.control.disable` $target_id (`activation` $activation^)?
              attr-dict

An activation operand targets one dynamically enclosing activation. Without it, lexical mode resolves the innermost inherited activation while hierarchical mode disables all live activations of the exact elaborated target ID.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
target_id	::mlir::IntegerAttr	64-bit signless integer attribute
hierarchical	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
activation	opaque dynamic named-control activation token

simulation.control.disable_selected (::talos::sim::SimControlDisableSelectedOp)

Disable controls and return the exact current activation selected

Syntax:

operation ::= `simulation.control.disable_selected` $target_id (`activation` $activation^)? attr-dict

Returns the outermost affected dynamic activation in this logical process, or zero if only other processes were affected. The returned scalar remains usable after the selected control is unwound; it cannot enter or leave a control. Hierarchical recursive occurrences are distinguished by this token.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
target_id	::mlir::IntegerAttr	64-bit signless integer attribute
hierarchical	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
activation	opaque dynamic named-control activation token

Results:

Result	Description
selected	64-bit signless integer

simulation.control.enter (::talos::sim::SimControlEnterOp)

Enter one dynamic activation of a resolved named block

Syntax:

operation ::= `simulation.control.enter` $target_id attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
target_id	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
control	opaque dynamic named-control activation token

simulation.control.escape_pending (::talos::sim::SimControlEscapePendingOp)

Consume a same-process nonlocal disable escape request

Syntax:

operation ::= `simulation.control.escape_pending` attr-dict

Returns true exactly when the preceding resolved disable selected a named block in an older task activation of the current logical process. The current task must then return without copyout; the scheduler resumes the owning activation at the registered control boundary.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Results:

Result	Description
pending	1-bit signless integer

simulation.control.leave (::talos::sim::SimControlLeaveOp)

Leave a named block activation normally

Syntax:

operation ::= `simulation.control.leave` $control attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
control	opaque dynamic named-control activation token

simulation.control.local_boundary (::talos::sim::SimControlLocalBoundaryOp)

Retain a synchronous control exit until escape CFG lowering

Syntax:

operation ::= `simulation.control.local_boundary` $activation `exit` $exit `body` $body attr-dict

This compiler-only boundary keeps the exact activation and exit block for synchronous functions. Escape lowering creates actual branches to the exit only for the matching dynamic token, then replaces this marker with its ordinary body branch. It registers no scheduler continuation.

Traits: Terminator

Interfaces: BranchOpInterface

Operands:

Operand	Description
activation	opaque dynamic named-control activation token

Successors:

Successor	Description
exit	any successor
body	any successor

simulation.control.match (::talos::sim::SimControlMatchOp)

Test a selected token against one exact control activation

Syntax:

operation ::= `simulation.control.match` $selected `,` $activation attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
selected	64-bit signless integer
activation	opaque dynamic named-control activation token

Results:

Result	Description
matches	1-bit signless integer

simulation.control.nonlocal_exit (::talos::sim::SimControlNonlocalExitOp)

Mark the exceptional path of a nonlocal named-block exit

Syntax:

operation ::= `simulation.control.nonlocal_exit` $target_id (`selected` $selected^)? attr-dict

This marker precedes a callable return selected by control.escape_pending. Mandatory inlining resolves it either to a locally dominating named-block boundary or to an abnormal task return whose caller boundary was prepared by the runtime.

Attributes:

Attribute	MLIR Type	Description
target_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
selected	64-bit signless integer

simulation.coverage.control_definition (::talos::sim::SimCoverageControlDefinitionOp)

Control code coverage selected by module definition

Syntax:

operation ::= `simulation.coverage.control_definition` $context `control` $control `metric` $metric `scope` $scope
              `definition` $definition attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
control	32-bit signless integer
metric	32-bit signless integer
scope	32-bit signless integer
definition	nullable immutable managed SystemVerilog string

Results:

Result	Description
status	32-bit signless integer

simulation.coverage.control_instance (::talos::sim::SimCoverageControlInstanceOp)

Control code coverage selected by elaborated instance

Syntax:

operation ::= `simulation.coverage.control_instance` $context `control` $control `metric` $metric `scope` $scope
              `instance` $coverage_scope_id attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
coverage_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
control	32-bit signless integer
metric	32-bit signless integer
scope	32-bit signless integer

Results:

Result	Description
status	32-bit signless integer

simulation.coverage.functional_get (::talos::sim::SimFunctionalCoverageGetOp)

Query global functional coverage

Syntax:

operation ::= `simulation.coverage.functional_get` $context attr-dict `:` type($context) `->` type($percentage)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
percentage	64-bit float

simulation.coverage.functional_load_db (::talos::sim::SimFunctionalCoverageLoadDbOp)

Load cumulative functional coverage from a database

Syntax:

operation ::= `simulation.coverage.functional_load_db` $context `,` $name attr-dict `:` type($context) `,` qualified(type($name))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
name	nullable immutable managed SystemVerilog string

simulation.coverage.functional_set_db_name (::talos::sim::SimFunctionalCoverageSetDbNameOp)

Set the automatic functional coverage database name

Syntax:

operation ::= `simulation.coverage.functional_set_db_name` $context `,` $name attr-dict `:` type($context) `,` qualified(type($name))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
name	nullable immutable managed SystemVerilog string

simulation.coverage.keepalive (::talos::sim::SimCoverageKeepaliveOp)

Retain a function containing an inventoried coverage point

Syntax:

operation ::= `simulation.coverage.keepalive` $function attr-dict

Creates an explicit symbol-use edge from the design inventory to a private function containing an included line-coverage obligation. This prevents later symbol DCE from invalidating the already-built coverage schema. The finalization pass erases the marker after all symbol-pruning passes.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
function	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.coverage.merge (::talos::sim::SimCoverageMergeOp)

Merge one code-coverage metric from a coverage database

Syntax:

operation ::= `simulation.coverage.merge` $context `metric` $metric `name` $name attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
metric	32-bit signless integer
name	nullable immutable managed SystemVerilog string

Results:

Result	Description
status	32-bit signless integer

simulation.coverage.point_hit (::talos::sim::SimCoveragePointHitOp)

Saturating hit of one inventoried coverage point

Syntax:

operation ::= `simulation.coverage.point_hit` $context `if` $enabled `[` $point `]` attr-dict `:` type($context)

Records a semantic execution point by its dense physical counter index: a source line point, or (with kind assertion) the success of an assertion statement. Stable point identity and source metadata live in the embedded native coverage schema. The explicit index keeps lowering cheap while the resource effect prevents motion across observed execution boundaries.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
point	::mlir::IntegerAttr	64-bit signless integer attribute whose value is non-negative
kind	::talos::sim::CoveragePointKindAttr	simulation coverage point kind

Operands:

Operand	Description
context	opaque simulator and design context
enabled	1-bit signless integer

simulation.coverage.query_definition (::talos::sim::SimCoverageQueryDefinitionOp)

Query code coverage selected by module definition

Syntax:

operation ::= `simulation.coverage.query_definition` $context `metric` $metric `scope` $scope `definition` $definition
              `maximum` $maximum attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
maximum	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
context	opaque simulator and design context
metric	32-bit signless integer
scope	32-bit signless integer
definition	nullable immutable managed SystemVerilog string

Results:

Result	Description
value	32-bit signless integer

simulation.coverage.query_instance (::talos::sim::SimCoverageQueryInstanceOp)

Query code coverage selected by elaborated instance

Syntax:

operation ::= `simulation.coverage.query_instance` $context `metric` $metric `scope` $scope `instance` $coverage_scope_id
              `maximum` $maximum attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
coverage_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
maximum	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
context	opaque simulator and design context
metric	32-bit signless integer
scope	32-bit signless integer

Results:

Result	Description
value	32-bit signless integer

simulation.coverage.save (::talos::sim::SimCoverageSaveOp)

Save one code-coverage metric to a coverage database

Syntax:

operation ::= `simulation.coverage.save` $context `metric` $metric `name` $name attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
metric	32-bit signless integer
name	nullable immutable managed SystemVerilog string

Results:

Result	Description
status	32-bit signless integer

simulation.covergroup.bind_with (::talos::sim::SimCovergroupBindWithOp)

Bind satisfying value tuples before selecting a parent

Syntax:

operation ::= `simulation.covergroup.bind_with` $context `,` $token `from` $queue `selector` $selector
              attr-dict `:` type($queue)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
selector	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
token	64-bit signless integer
queue	any type

simulation.covergroup.block_event.fire (::talos::sim::SimCovergroupBlockEventFireOp)

Fire one exact covergroup block boundary

Syntax:

operation ::= `simulation.covergroup.block_event.fire` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
target_id	::mlir::IntegerAttr	64-bit signless integer attribute
event_kind	::talos::sim::BlockEventKindAttr	simulation block event kind

Operands:

Operand	Description
context	opaque simulator and design context
receiver	nullable statically typed managed class handle

simulation.covergroup.block_event.plan (::talos::sim::SimCovergroupBlockEventPlanOp)

Defer a covergroup block-event sampler to its design pass

Syntax:

operation ::= `simulation.covergroup.block_event.plan` operands attr-dict `:` functional-type(operands, results)

Transiently records construction-site captures for one block-event covergroup. The design-anchored materialization pass creates the private sample evaluator and replaces this operation with an immediate block-event registration. Unlike a clocking event, this never creates or parks a process, and type_option.strobe has no effect.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
has_receiver	::mlir::BoolAttr	bool attribute
class_owner_capture	::mlir::IntegerAttr	32-bit signless integer attribute
node_id	::mlir::IntegerAttr	64-bit signless integer attribute
covergroup_symbol	::mlir::StringAttr	string attribute
bindings	::mlir::ArrayAttr	array attribute
capture_attrs	::mlir::ArrayAttr	array attribute
target_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute
event_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
captures	variadic of any type

simulation.covergroup.block_event.register (::talos::sim::SimCovergroupBlockEventRegisterOp)

Register synchronous block-event covergroup sampling

Syntax:

operation ::= `simulation.covergroup.block_event.register` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
target_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute
event_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
receiver	nullable statically typed managed class handle
sampler	bound zero-time computed timing evaluator

simulation.covergroup.candidates (::talos::sim::SimCovergroupCandidatesOp)

Fill an empty CrossQueueType with distinct selected values

Syntax:

operation ::= `simulation.covergroup.candidates` $context `,` $token `into` $queue `selector` $selector `maximum` $maximum
              attr-dict `:` type($queue)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
selector	::mlir::IntegerAttr	64-bit signless integer attribute
maximum	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
token	64-bit signless integer
queue	any type

simulation.covergroup.cast (::talos::sim::SimCovergroupCastOp)

Change the static type of a related covergroup handle

Syntax:

operation ::= `simulation.covergroup.cast` $input attr-dict `:` qualified(type($input)) `to` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable statically typed functional coverage handle

Results:

Result	Description
result	nullable statically typed functional coverage handle

simulation.covergroup.clock_event.register (::talos::sim::SimCovergroupClockEventRegisterOp)

Register exact clock-event covergroup sampling

Syntax:

operation ::= `simulation.covergroup.clock_event.register` $context `,` $handle `events` `[` $values `]`
              `conditions` $condition_count `edges` $edges
              `indices` $condition_indices attr-dict `:` qualified(type($handle)) `,` type($values)

Registers a compiler-private covergroup sampling observer with the current detached owner process. The first edges.size() values are bound primary observers, followed by one encounter-time initial value per primary, condition_count bound iff observers, and one bound sample observer. The runtime reevaluates a primary when any of its dependencies is published, compares the complete expression result for a change event, and uses its least-significant bit for an explicit edge. It evaluates an iff observer only after the corresponding primary occurrence.

The runtime invokes the sample observer synchronously for each qualifying atomic publication unless the resolved v1 covergroup schema sets type_option.strobe. Strobe registrations retain one trigger per numeric time and evaluate the observer in the Postponed region. Multiple matching clauses in one publication always produce one sample.

This operation is part of the single mutable v1 runtime ABI. It does not describe or preserve an older execution layout.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
condition_count	::mlir::IntegerAttr	32-bit signless integer attribute
strobe	::mlir::BoolAttr	bool attribute
edges	::mlir::DenseI32ArrayAttr	i32 dense array attribute
condition_indices	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
values	variadic of any type

simulation.covergroup.clock_event.spawn (::talos::sim::SimCovergroupClockingSpawnOp)

Defer a covergroup clocking sampler to its design pass

Syntax:

operation ::= `simulation.covergroup.clock_event.spawn` operands attr-dict `:` functional-type(operands, results)

Transiently records the spawn of one automatic functional-coverage sampler. Per-function lowering may create this operation but must not mutate its parent design’s symbol table. The subsequent design-anchored materialization pass replaces it with an ordinary simulation.spawn and creates the private sampler symbol.

bindings contains only the declaration paths referenced by the clocking event or sample plan. capture_attrs describes the complete eventual sampler argument list (context, handle, then captures). The operation is forbidden at the finalized simulation boundary. class_owner_capture is the capture index of an embedded covergroup’s owning object, or -1 for a non-class covergroup.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
class_owner_capture	::mlir::IntegerAttr	32-bit signless integer attribute
node_id	::mlir::IntegerAttr	64-bit signless integer attribute
covergroup_symbol	::mlir::StringAttr	string attribute
bindings	::mlir::ArrayAttr	array attribute
capture_attrs	::mlir::ArrayAttr	array attribute
event_observers	::mlir::ArrayAttr	array attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
captures	variadic of any type

simulation.covergroup.create (::talos::sim::SimCovergroupCreateOp)

Create an enabled per-instance coverage accumulator

Syntax:

operation ::= `simulation.covergroup.create` $context `from` $declaration
              `payloads` `[` $payloads `]` `argument_count` $argument_count
              `formal_ids` $formal_ids `expression_ids` $expression_ids
              attr-dict `:` functional-type($payloads, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
declaration	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
argument_count	::mlir::IntegerAttr	32-bit signless integer attribute
formal_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute
expression_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
payloads	variadic of any type

Results:

Result	Description
result	nullable statically typed functional coverage handle

simulation.covergroup.decl (::talos::sim::SimCovergroupDeclOp)

Symbolic reference to an embedded covergroup schema

Syntax:

operation ::= `simulation.covergroup.decl` $sym_name `schema` $schema_type
              (`base` $base^)? (`debug` $debug_name^)? attr-dict

Names one functional-coverage type in the module’s embedded typed v1 coverage database. schema_type is the stable type identity from that database; it is not a physical table index. Coverpoints, crosses, bins, options, source provenance, and resolved configurations live only in the database and are deliberately not duplicated as parallel MLIR arrays.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
schema_type	::mlir::IntegerAttr	64-bit signless integer attribute
base	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
debug_name	::mlir::StringAttr	string attribute

simulation.covergroup.equal (::talos::sim::SimCovergroupEqualOp)

Compare nullable covergroup instance identities

Syntax:

operation ::= `simulation.covergroup.equal` $lhs `,` $rhs attr-dict `:` qualified(type($lhs)) `,`
              qualified(type($rhs))

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	nullable statically typed functional coverage handle
rhs	nullable statically typed functional coverage handle

Results:

Result	Description
equal	1-bit signless integer

simulation.covergroup.formal_read (::talos::sim::SimCovergroupFormalReadOp)

Read a constructor formal captured by a covergroup instance

Syntax:

operation ::= `simulation.covergroup.formal_read` $context `,` $handle `[` $formal_id `]` attr-dict `:`
              type($context) `,` qualified(type($handle)) `->` qualified(type($result))

Projects the value of an input constructor formal, or the retained typed argument reference or current value of a live ref constructor formal, from the instance configuration. A typed argument reference preserves the storage binding until each use and can be passed to const-ref helpers. The positive stable ID names a FunctionalFormal record in the embedded v1 schema; it is not a physical table index. Input strings retain immutable managed values; references load the current typed storage. A reference path may detach its selected element or obtain a managed string snapshot, so reading can allocate and update the heap.

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
formal_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

Results:

Result	Description
result	any type

simulation.covergroup.get_integer_option (::talos::sim::SimCovergroupGetIntegerOptionOp)

Read an integral option from a covergroup instance owner

Syntax:

operation ::= `simulation.covergroup.get_integer_option` $context `,` $handle `item` $item `option` $option
              attr-dict `:` type($context) `,` qualified(type($handle))

item is zero for the covergroup owner or a positive stable template FunctionalItem ID for a coverpoint or cross. The result is the current effective per-instance value after group defaults and item overrides. Construction-only fields are readable but cannot be assigned procedurally.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

Results:

Result	Description
value	64-bit signless integer

simulation.covergroup.get_string_option (::talos::sim::SimCovergroupGetStringOptionOp)

Read a covergroup name or an instance owner’s comment

Syntax:

operation ::= `simulation.covergroup.get_string_option` $context `,` $handle `item` $item `option` $option
              attr-dict `:` type($context) `,` qualified(type($handle))

item is zero for the group or a stable template FunctionalItem ID. Names are group-only. The result is a managed string snapshot of the current option value, including constructor values and later edits.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

Results:

Result	Description
value	nullable immutable managed SystemVerilog string

simulation.covergroup.instance_query (::talos::sim::SimCovergroupInstanceQueryOp)

Query per-instance covergroup or functional-item coverage

Syntax:

operation ::= `simulation.covergroup.instance_query` $context `,` $handle `item` $item attr-dict `:`
              type($context) `,` qualified(type($handle)) `->` `(` type($percentage) `,`
              type($covered) `,` type($total) `)`

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

Results:

Result	Description
percentage	64-bit float
covered	32-bit signless integer
total	32-bit signless integer

simulation.covergroup.null (::talos::sim::SimCovergroupNullOp)

Typed null functional coverage handle

Syntax:

operation ::= `simulation.covergroup.null` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	nullable statically typed functional coverage handle

simulation.covergroup.option_reference (::talos::sim::SimCovergroupOptionReferenceOp)

Capture an instance option for a deferred owner-local write

Syntax:

operation ::= `simulation.covergroup.option_reference` $context `,` $handle `item` $item `option` $option `mask` $mask
              `index` $index `character` $character attr-dict `:`
              type($context) `,` qualified(type($handle)) `->` qualified(type($result))

Captures the typed receiver, stable item selector and either a positioned integral mask or a string-character index. Integer paths carry i64 patch bits; whole strings and character paths carry string and i8 respectively. The current field is read only when a masked/character update commits.

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option
character	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
mask	64-bit signless integer
index	64-bit signless integer

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.covergroup.prepare (::talos::sim::SimCovergroupPrepareOp)

Resolve constructor bins into a private coverage preparation

Syntax:

operation ::= `simulation.covergroup.prepare` $context `from` $declaration `payloads` `[` $payloads `]`
              `expression_ids` $expression_ids attr-dict
              `:` functional-type($payloads, results)

Resolves primitive constructor expressions without publishing a coverage configuration or instance. The context owns the opaque token until covergroup.release_preparation. Selector predicates are evaluated later against candidate queues; they are absent from this payload batch.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
declaration	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
expression_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
payloads	variadic of any type

Results:

Result	Description
token	64-bit signless integer

simulation.covergroup.release_preparation (::talos::sim::SimCovergroupReleasePreparationOp)

Release a private constructor preparation

Syntax:

operation ::= `simulation.covergroup.release_preparation` $context `,` $token attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
token	64-bit signless integer

simulation.covergroup.sample (::talos::sim::SimCovergroupSampleOp)

Atomically commit one typed functional-coverage sample

Syntax:

operation ::= `simulation.covergroup.sample` $context `,` $handle
              `values` `[` $values `]` `ids` $expression_ids
              attr-dict `:` functional-type(operands, results)

Carries the once-evaluated results of every sample-phase expression needed by the instance’s typed plan. expression_ids contains the corresponding stable FunctionalExpression identities from the embedded schema in operand order. These are semantic identities, never physical table indices. The runtime resolves the handle’s constructor configuration and atomically performs direct-bin matching, transition automata, ignore and illegal precedence, and cross tuple/selector processing.

Integral and four-state sampled values remain typed values; predicates are i1 and real coverpoint samples are f64. A string, container, aggregate reference path, class handle, chandle, or event may occur only for the once-evaluated default of a corresponding formal on an overridden sample() method; matching consumes the derived coverpoint and guard results. This batch form ensures that a sampled expression or iff predicate is evaluated once per sampling event even when several bins, transition steps, or crosses consume it.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
expression_ids	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
values	variadic of signless integer or fixed-width exact four-state packed value or nullable immutable managed SystemVerilog string or managed SystemVerilog dynamic array value or managed SystemVerilog queue value or managed SystemVerilog associative array value or managed escaping dynamic-lvalue path or nullable statically typed managed class handle or nullable opaque DPI C pointer or opaque scheduler event handle or nullable statically typed functional coverage handle or opaque scheduler process handle or nullable statically typed virtual interface handle or managed SystemVerilog semaphore handle or managed typed SystemVerilog mailbox handle or 32-bit float or 64-bit float

simulation.covergroup.sample_enabled (::talos::sim::SimCovergroupSampleEnabledOp)

Test whether a covergroup instance currently samples

Syntax:

operation ::= `simulation.covergroup.sample_enabled` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

Results:

Result	Description
result	1-bit signless integer

simulation.covergroup.set_integer_option (::talos::sim::SimCovergroupSetIntegerOptionOp)

Set a mutable integral option on a covergroup instance owner

Syntax:

operation ::= `simulation.covergroup.set_integer_option` $context `,` $handle `item` $item `option` $option `value` $value
              attr-dict `:` type($context) `,` qualified(type($handle))

item is zero for the covergroup owner or a positive stable template FunctionalItem ID for a coverpoint or cross. The runtime applies the assignment to this instance only. Group-level at_least remains a default and therefore does not replace an item-level override.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
value	64-bit signless integer

simulation.covergroup.set_name (::talos::sim::SimCovergroupSetNameOp)

Set the persistent name of a covergroup instance

Syntax:

operation ::= `simulation.covergroup.set_name` $context `,` $handle `name` $name attr-dict `:`
              type($context) `,` qualified(type($handle))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
name	nullable immutable managed SystemVerilog string

simulation.covergroup.set_string_option (::talos::sim::SimCovergroupSetStringOptionOp)

Set a mutable string option on a covergroup instance owner

Syntax:

operation ::= `simulation.covergroup.set_string_option` $context `,` $handle `item` $item `option` $option `value` $value
              attr-dict `:` type($context) `,` qualified(type($handle))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle
value	nullable immutable managed SystemVerilog string

simulation.covergroup.set_type_integer_option (::talos::sim::SimCovergroupSetTypeIntegerOptionOp)

Set a mutable integral option on a covergroup type owner

Syntax:

operation ::= `simulation.covergroup.set_type_integer_option` $context `type` $typeId `item` $item `option` $option `value` $value
              attr-dict `:` type($context)

type and item are stable schema identities. item is zero for the covergroup or a positive template FunctionalItem ID. The update applies immediately to cumulative queries and to configurations resolved later. The group-only distribute_first option affects future bin construction; existing configurations and counters remain intact.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
typeId	::mlir::IntegerAttr	64-bit signless integer attribute
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
value	64-bit signless integer

simulation.covergroup.set_type_string_option (::talos::sim::SimCovergroupSetTypeStringOptionOp)

Set a mutable string option on a covergroup type owner

Syntax:

operation ::= `simulation.covergroup.set_type_string_option` $context `type` $typeId `item` $item `option` $option `value` $value
              attr-dict `:` type($context)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
typeId	::mlir::IntegerAttr	64-bit signless integer attribute
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option

Operands:

Operand	Description
context	opaque simulator and design context
value	nullable immutable managed SystemVerilog string

simulation.covergroup.start (::talos::sim::SimCovergroupStartOp)

Enable group or functional-item sampling without clearing coverage

Syntax:

operation ::= `simulation.covergroup.start` $context `,` $handle `item` $item attr-dict `:`
              type($context) `,` qualified(type($handle))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

simulation.covergroup.stop (::talos::sim::SimCovergroupStopOp)

Disable group or functional-item sampling without clearing coverage

Syntax:

operation ::= `simulation.covergroup.stop` $context `,` $handle `item` $item attr-dict `:`
              type($context) `,` qualified(type($handle))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Write on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
item	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
handle	nullable statically typed functional coverage handle

simulation.covergroup.type_option_reference (::talos::sim::SimCovergroupTypeOptionReferenceOp)

Capture a static option and its storage for a deferred write

Syntax:

operation ::= `simulation.covergroup.type_option_reference` $context `,` $reference `type` $typeId `item` $item `option` $option
              `mask` $mask `index` $index `character` $character attr-dict `:`
              type($context) `,` qualified(type($reference)) `->` qualified(type($result))

Retains the ordinary static field reference as well as the stable type and item identities. Commit publishes the converted option and updates its ordinary storage, preserving numeric masks and string-character writes.

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource, MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
typeId	::mlir::IntegerAttr	64-bit signless integer attribute
item	::mlir::IntegerAttr	64-bit signless integer attribute
option	::talos::sim::CovergroupInstanceOptionKindAttr	functional-coverage option
character	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
context	opaque simulator and design context
reference	polymorphic exact-alias subroutine reference
mask	64-bit signless integer
index	64-bit signless integer

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.covergroup.type_query (::talos::sim::SimCovergroupTypeQueryOp)

Query cumulative covergroup or functional-item coverage

Syntax:

operation ::= `simulation.covergroup.type_query` $context `from` $declaration `item` $item attr-dict `:`
              type($context) `->` `(` type($percentage) `,`
              type($covered) `,` type($total) `)`

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::CoverageResource}

Attributes:

Attribute	MLIR Type	Description
declaration	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
item	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
percentage	64-bit float
covered	32-bit signless integer
total	32-bit signless integer

simulation.design (::talos::sim::SimDesignOp)

Isolated flattened simulation design

Syntax:

operation ::= `simulation.design` $sym_name attr-dict-with-keyword $body

Owns one flattened descriptor and code-unit inventory. When present, time_precision_fs defines the femtosecond duration of one simulation.time tick for every nested code unit.

Traits: IsolatedFromAbove, NoTerminator, RecursiveMemoryEffects, SingleBlock, SymbolTable

Interfaces: Symbol

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
time_precision_fs	::mlir::IntegerAttr	64-bit signless integer attribute
compute_graph	::talos::schedule::ComputeGraphAttr

simulation.display (::talos::sim::SimDisplayOp)

Formatted display or write to a SystemVerilog descriptor

Syntax:

operation ::= `simulation.display` $context `to` $descriptor `(` $items `)`
              `newline` `=` $append_newline `radix` `=` $default_radix
              `flags` `=` $item_flags attr-dict
              `:` type($items)

item_flags describes the logical argument sequence. Bit 0 marks a nonempty packed operand signed; bit 1 represents an omitted argument and consumes no entry from items; bit 2 marks an f64 real operand; bit 3 marks a managed string; bit 4 marks a managed container. Bit 5 designates the literal or managed-string format that owns all remaining items on string.output_format; bit 6 marks a managed class handle; bit 7 marks a managed string as a non-designated output-list format; bit 8 marks a virtual-interface handle. scope and library_cell carry the elaborated call-site information used by %m and %l. time_multiplier converts a numeric %t argument from the invoking scope’s time unit to the design precision used by the runtime clock.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
append_newline	::mlir::BoolAttr	bool attribute
default_radix	::talos::sim::RadixAttr	simulation radix
item_flags	::mlir::DenseI32ArrayAttr	i32 dense array attribute
scope	::mlir::StringAttr	string attribute
library_cell	::mlir::StringAttr	string attribute
time_multiplier	::mlir::IntegerAttr	64-bit signless integer attribute
time_precision	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
items	variadic of any type

simulation.dpi.call (::talos::sim::SimDPICallOp)

Shared zero-time DPI-C import boundary

Syntax:

operation ::= `simulation.dpi.call` $c_identifier `id` $import_id `scope` $scope_id
              `context` $runtime_context `:` type($runtime_context)
              `(` $arguments `)` attr-dict `:`
              functional-type($arguments, $results)

Carries stable call-site metadata and normalized value operands. Results contain a function return first (when present), followed by output and inout copy-outs. Imported task C status is not an SV result.

Interfaces: MemoryEffectOpInterface, SymbolUserOpInterface

Attributes:

Attribute	MLIR Type	Description
import_id	::mlir::IntegerAttr	32-bit signless integer attribute
c_identifier	::mlir::StringAttr	string attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
abi_signature	::mlir::ArrayAttr	DPI ABI signature
is_pure	::mlir::BoolAttr	bool attribute
is_context	::mlir::BoolAttr	bool attribute
is_task	::mlir::BoolAttr	bool attribute
source_file	::mlir::StringAttr	string attribute
source_line	::mlir::IntegerAttr	32-bit signless integer attribute
source_column	::mlir::IntegerAttr	32-bit signless integer attribute
open_array_layouts	::mlir::ArrayAttr	array attribute
aggregate_layouts	::mlir::ArrayAttr	array attribute
logical_inputs	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
runtime_context	any type
arguments	variadic of any type

Results:

Result	Description
results	variadic of any type

simulation.driver.array_element (::talos::sim::SimDriverArrayElementOp)

Dynamic declared-range view into a fixed-array driver

Syntax:

operation ::= `simulation.driver.array_element` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed static net-driver handle
index	any type

Results:

Result	Description
result	typed static net-driver handle

simulation.driver.decl (::talos::sim::SimDriverDeclOp)

Immutable static net-driver descriptor

Syntax:

operation ::= `simulation.driver.decl` $id `in` $scope_id `drives` $net_id `:` $type
              $lifetime (`hierarchy` $hierarchical_name^)?
              (`debug` $debug_name^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
net_id	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
lifetime	::talos::sim::LifetimeAttr	simulation object lifetime
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
driven_low	::mlir::IntegerAttr	64-bit signless integer attribute
driven_width	::mlir::IntegerAttr	64-bit signless integer attribute
strength0	::talos::sim::StrengthAttr	signal strength scale position
strength1	::talos::sim::StrengthAttr	signal strength scale position

simulation.driver.drive (::talos::sim::SimDriverDriveOp)

Syntax:

operation ::= `simulation.driver.drive` $driver `=` $value attr-dict `:` qualified(type($driver)) `,` type($value)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::NetResource}

Operands:

Operand	Description
driver	typed static net-driver handle
value	any type

simulation.driver.drive_changed (::talos::sim::SimDriverDriveChangedOp)

Drive a net and return whether its resolved value changed

Syntax:

operation ::= `simulation.driver.drive_changed` $driver `=` $value attr-dict `:` qualified(type($driver)) `,` type($value)

This internal operation is the transition-producing form used by generated graph-region kernels. The result is true when any value or unknown-plane bit in the affected resolved net changes. Ordinary process bodies retain driver.drive; bytecode fallback bodies do not depend on this result.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::NetResource}

Operands:

Operand	Description
driver	typed static net-driver handle
value	any type

Results:

Result	Description
changed	1-bit signless integer

simulation.driver.drive_delayed_net (::talos::sim::SimDriverDriveDelayedNetOp)

Drive a net whose resolved value has an inertial net delay

Syntax:

operation ::= `simulation.driver.drive_delayed_net` $driver `=` $value attr-dict `:` qualified(type($driver)) `,` type($value)

Stores the driver contribution immediately, then resolves the target net and schedules any resulting visible transition using the delay metadata on the net declaration. The optional deferred-resolution flag pairs the two strength banks of a conditional primitive into one logical update.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
defer_resolution	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
driver	typed static net-driver handle
value	any type

simulation.driver.drive_inertial (::talos::sim::SimDriverDriveInertialOp)

Schedule an inertial gate or continuous-assignment drive

Syntax:

operation ::= `simulation.driver.drive_inertial` $driver `=` $value `after` `[` $rise_delay `,` $fall_delay `,`
              $turnoff_delay `]` `site` $code_unit_id `:` $component
              `vector` `=` $vector_delay attr-dict `:` qualified(type($driver)) `,`
              type($value)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
component	::mlir::IntegerAttr	32-bit signless integer attribute
vector_delay	::mlir::BoolAttr	bool attribute
defer_resolution	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
driver	typed static net-driver handle
value	any type
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.driver.drive_inertial_path (::talos::sim::SimDriverDriveInertialPathOp)

Schedule one packed module-path inertial delay group

Syntax:

operation ::= `simulation.driver.drive_inertial_path` $driver `=` $value `active` $active_mask `masks` `[` $rise_mask `,`
              $fall_mask `,` $turnoff_mask `]` `after` `[` $rise_delay `,`
              $fall_delay `,` $turnoff_delay `]` `site` $code_unit_id `:` $component
              `group` $group `of` $group_count
              (`pulse_transitions` $pulse_transition_masks^ `:` type($pulse_transition_masks))?
              attr-dict `:` qualified(type($driver)) `,`
              type($value) `,` type($active_mask)

active_mask selects bits governed by a path on this activation. The transition masks assign each active bit to this static delay group for rise, fall, and turnoff independently. Groups with the same site execute consecutively; group zero starts a keyed generation batch, avoiding any scheduler-queue cancellation scan.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
component	::mlir::IntegerAttr	32-bit signless integer attribute
group	::mlir::IntegerAttr	32-bit signless integer attribute
group_count	::mlir::IntegerAttr	32-bit signless integer attribute
defer_resolution	::mlir::BoolAttr	bool attribute
pulse_reject	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_error	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_on_detect	::mlir::BoolAttr	bool attribute
pulse_show_cancelled	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
driver	typed static net-driver handle
value	any type
active_mask	signless integer
rise_mask	signless integer
fall_mask	signless integer
turnoff_mask	signless integer
pulse_transition_masks	signless integer
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.driver.drive_inertial_path_strength_pair (::talos::sim::SimDriverDriveInertialPathStrengthPairOp)

Schedule one masked module-path strength-pair delay group

Syntax:

operation ::= `simulation.driver.drive_inertial_path_strength_pair` $low_driver `=` $low_value `,` $high_driver `=` $high_value
              `transition` $transition_value `active` $active_mask `masks` `[`
              $rise_mask `,` $fall_mask `,` $turnoff_mask `]` `after` `[`
              $rise_delay `,` $fall_delay `,` $turnoff_delay `]` `site`
              $code_unit_id `:` $component `group` $group `of` $group_count
              (`pulse_transitions` $pulse_transition_masks^ `:` type($pulse_transition_masks))?
              attr-dict
              `:` qualified(type($low_driver)) `,` type($low_value) `,`
              qualified(type($high_driver)) `,` type($high_value) `,`
              type($transition_value) `,` type($active_mask)

Schedules the complementary polarity banks of a conditional primitive as one atomic masked module-path update. All groups for a site execute consecutively; group zero starts one per-bit arbitration batch.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
component	::mlir::IntegerAttr	32-bit signless integer attribute
group	::mlir::IntegerAttr	32-bit signless integer attribute
group_count	::mlir::IntegerAttr	32-bit signless integer attribute
pulse_reject	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_error	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_on_detect	::mlir::BoolAttr	bool attribute
pulse_show_cancelled	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
low_driver	typed static net-driver handle
low_value	any type
high_driver	typed static net-driver handle
high_value	any type
transition_value	any type
active_mask	signless integer
rise_mask	signless integer
fall_mask	signless integer
turnoff_mask	signless integer
pulse_transition_masks	signless integer
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.driver.drive_inertial_strength_pair (::talos::sim::SimDriverDriveInertialStrengthPairOp)

Schedule one inertial three-state strength-pair drive

Syntax:

operation ::= `simulation.driver.drive_inertial_strength_pair` $low_driver `=` $low_value `,` $high_driver `=` $high_value
              `transition` $transition_value `after` `[` $rise_delay `,` $fall_delay `,`
              $turnoff_delay `]` `site` $code_unit_id `:` $component attr-dict `:`
              qualified(type($low_driver)) `,` type($low_value) `,`
              qualified(type($high_driver)) `,` type($high_value) `,`
              type($transition_value)

Schedules the two polarity banks used to represent one bufif or notif output as a single inertial update. transition_value is the logical four-state gate output used to select the rise, fall, turn-off, or unknown delay. The low and high bank contributions mature atomically before net resolution, including when only one bank changes.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
component	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
low_driver	typed static net-driver handle
low_value	any type
high_driver	typed static net-driver handle
high_value	any type
transition_value	any type
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.driver.dyn_extract (::talos::sim::SimDriverDynExtractOp)

Dynamically select a packed driver slice

Syntax:

operation ::= `simulation.driver.dyn_extract` $input `from` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index may be a signless builtin integer or four-state logic. An unknown index suppresses the drive. Out-of-range bits are ignored while in-range bits retain their normal net-driving effects.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed static net-driver handle
low_bit	any type

Results:

Result	Description
result	typed static net-driver handle

simulation.driver.extract (::talos::sim::SimDriverExtractOp)

Syntax:

operation ::= `simulation.driver.extract` $input `from` $low_bit attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
low_bit	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	typed static net-driver handle

Results:

Result	Description
result	typed static net-driver handle

simulation.driver.read (::talos::sim::SimDriverReadOp)

Read one raw user-defined net driver contribution

Syntax:

operation ::= `simulation.driver.read` $driver attr-dict `:` qualified(type($driver)) `->` type($result)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::NetResource}

Operands:

Operand	Description
driver	typed static net-driver handle

Results:

Result	Description
result	any type

simulation.driver.subelement (::talos::sim::SimDriverSubelementOp)

Static declaration-order view into an aggregate driver

Syntax:

operation ::= `simulation.driver.subelement` $input `[` $indices `]` attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
indices	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
input	typed static net-driver handle

Results:

Result	Description
result	typed static net-driver handle

simulation.dump.all (::talos::sim::SimDumpAllOp)

Emit every selected variable at the current time

Syntax:

operation ::= `simulation.dump.all` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.dump.control (::talos::sim::SimDumpControlOp)

$dumpon / $dumpoff

Syntax:

operation ::= `simulation.dump.control` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
enabled	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
context	opaque simulator and design context

simulation.dump.flush (::talos::sim::SimDumpFlushOp)

Flush buffered waveform output to the file

Syntax:

operation ::= `simulation.dump.flush` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.dump.limit (::talos::sim::SimDumpLimitOp)

Bound the waveform file size in bytes

Syntax:

operation ::= `simulation.dump.limit` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
bytes	64-bit signless integer

simulation.dump.open (::talos::sim::SimDumpOpenOp)

Select the waveform file named by $dumpfile

Syntax:

operation ::= `simulation.dump.open` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	immutable literal byte sequence

simulation.dump.open_string (::talos::sim::SimDumpOpenStringOp)

Select the waveform file named by a dynamic string

Syntax:

operation ::= `simulation.dump.open_string` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	nullable immutable managed SystemVerilog string

simulation.dump.ports (::talos::sim::SimDumpPortsOp)

Add one module’s ports to a named EVCD session

Syntax:

operation ::= `simulation.dump.ports` operands attr-dict `:` functional-type(operands, results)

path is the EVCD filename and scope is an elaborated module-instance path. Calls naming the same file accumulate unique scopes. The runtime starts every session at the end of the time slot containing its first selection, independently of the ordinary VCD session.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	nullable immutable managed SystemVerilog string
scope	nullable immutable managed SystemVerilog string
timescale_exponent	32-bit signless integer

simulation.dump.ports_control (::talos::sim::SimDumpPortsControlOp)

Control one or all named EVCD sessions

Syntax:

operation ::= `simulation.dump.ports_control` operands attr-dict `:` functional-type(operands, results)

An empty path targets every active EVCD session; a nonmatching path is ignored. value carries the byte limit for limit and is otherwise zero.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
action	::talos::sim::DumpPortsActionAttr	EVCD session control action

Operands:

Operand	Description
context	opaque simulator and design context
path	nullable immutable managed SystemVerilog string
value	64-bit signless integer

simulation.dump.timescale (::talos::sim::SimDumpTimescaleOp)

Declare the $timescale written into the waveform header

Syntax:

operation ::= `simulation.dump.timescale` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
exponent	32-bit signless integer

simulation.dump.vars (::talos::sim::SimDumpVarsOp)

Add one $dumpvars selection to the traced set

Syntax:

operation ::= `simulation.dump.vars` operands attr-dict `:` functional-type(operands, results)

levels is the IEEE depth, where zero selects every level below scope. An empty scope selects the design root. Selections accumulate until the end of the time slot that made the first one.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
levels	64-bit signless integer
scope	immutable literal byte sequence

simulation.dynamic_override (::talos::sim::SimDynamicOverrideOp)

Claim or reevaluate a dependency-driven static-target override

Syntax:

operation ::= `simulation.dynamic_override` $target `=` $value `owner` $owner `assign` $is_assign `claim` $claim attr-dict `:` type($target) `,` type($value)

The owner is the evaluator process spawned for one execution of a force or procedural assign statement. A claim replaces prior ownership for the target range and publishes the initial value. A reevaluation updates only bits the owner still controls, so partially overlapping later overrides do not resurrect superseded bits. Release and replacement retire an evaluator as soon as it owns no bits.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
is_assign	::mlir::BoolAttr	bool attribute
claim	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
target	any type
value	any type
owner	opaque scheduler process handle

simulation.error (::talos::sim::SimErrorOp)

Record a nonterminating simulation error

Syntax:

operation ::= `simulation.error` $context attr-dict

Records an unsuccessful final simulation status without requesting termination. Ordinary scheduling continues until the design otherwise completes or explicitly terminates.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.event.create (::talos::sim::SimEventCreateOp)

Create a fresh named-event synchronization object

Syntax:

operation ::= `simulation.event.create` attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Results:

Result	Description
result	opaque scheduler event handle

simulation.event.equal (::talos::sim::SimEventEqualOp)

Compare two event handles for synchronization-object identity

Syntax:

operation ::= `simulation.event.equal` $lhs `,` $rhs attr-dict

Traits: AlwaysSpeculatableImplTrait, SameTypeOperands

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	opaque scheduler event handle
rhs	opaque scheduler event handle

Results:

Result	Description
result	1-bit signless integer

simulation.event.null (::talos::sim::SimEventNullOp)

Null event handle

Syntax:

operation ::= `simulation.event.null` attr-dict

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	opaque scheduler event handle

simulation.event.trigger (::talos::sim::SimEventTriggerOp)

Syntax:

operation ::= `simulation.event.trigger` $event (`after` $delay^)? `nonblocking` `=` $nonblocking attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
nonblocking	::mlir::BoolAttr	bool attribute
site	::talos::schedule::EventSiteAttr
replaceable	::mlir::UnitAttr	unit attribute

Operands:

Operand	Description
event	opaque scheduler event handle
delay	target-independent scaled simulation time

simulation.event.triggered (::talos::sim::SimEventTriggeredOp)

Test whether an event occurred in the current time slot

Syntax:

operation ::= `simulation.event.triggered` $event attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
event	opaque scheduler event handle

Results:

Result	Description
result	1-bit signless integer

simulation.fatal (::talos::sim::SimFatalOp)

Request orderly unsuccessful simulation termination

Syntax:

operation ::= `simulation.fatal` $context `,` $verbosity attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context
verbosity	32-bit signless integer

simulation.file.close (::talos::sim::SimFileCloseOp)

Syntax:

operation ::= `simulation.file.close` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

simulation.file.eof (::talos::sim::SimFileEofOp)

Syntax:

operation ::= `simulation.file.eof` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer

simulation.file.error_string (::talos::sim::SimFileErrorStringOp)

Read a descriptor’s pending error code and message

Syntax:

operation ::= `simulation.file.error_string` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
message	nullable immutable managed SystemVerilog string
code	32-bit signless integer

simulation.file.flush (::talos::sim::SimFileFlushOp)

Syntax:

operation ::= `simulation.file.flush` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

simulation.file.getc (::talos::sim::SimFileGetcOp)

Syntax:

operation ::= `simulation.file.getc` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer

simulation.file.getline (::talos::sim::SimFileGetlineOp)

Read one bounded line for assignment to a packed value

Syntax:

operation ::= `simulation.file.getline` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
data	integer
count	32-bit signless integer

simulation.file.getline_string (::talos::sim::SimFileGetlineStringOp)

Read one complete line into a managed string

Syntax:

operation ::= `simulation.file.getline_string` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
data	nullable immutable managed SystemVerilog string
count	32-bit signless integer

simulation.file.open (::talos::sim::SimFileOpenOp)

Syntax:

operation ::= `simulation.file.open` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	immutable literal byte sequence
mode	immutable literal byte sequence

Results:

Result	Description
descriptor	32-bit signless integer

simulation.file.open_mcd (::talos::sim::SimFileOpenMCDOp)

Syntax:

operation ::= `simulation.file.open_mcd` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	immutable literal byte sequence

Results:

Result	Description
descriptor	32-bit signless integer

simulation.file.open_string (::talos::sim::SimFileOpenStringOp)

Syntax:

operation ::= `simulation.file.open_string` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	nullable immutable managed SystemVerilog string
mode	nullable immutable managed SystemVerilog string

Results:

Result	Description
descriptor	32-bit signless integer

simulation.file.open_string_mcd (::talos::sim::SimFileOpenStringMCDOp)

Syntax:

operation ::= `simulation.file.open_string_mcd` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
path	nullable immutable managed SystemVerilog string

Results:

Result	Description
descriptor	32-bit signless integer

simulation.file.read_packed (::talos::sim::SimFileReadPackedOp)

Read bytes into an integral variable in big-endian order

Syntax:

operation ::= `simulation.file.read_packed` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
data	integer
count	32-bit signless integer

simulation.file.readmem_token (::talos::sim::SimFileReadMemTokenOp)

Read one IEEE $readmem data or address token

Syntax:

operation ::= `simulation.file.readmem_token` operands attr-dict `:` functional-type(operands, results)

Reads one token using the lexical grammar shared by $readmemb and $readmemh. The four-state data preserves 0, 1, X, and Z. kind is one of the public runtime readmem token constants.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
radix	::talos::sim::RadixAttr	simulation radix

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
data	fixed-width exact four-state packed value
kind	32-bit signless integer
address	64-bit signless integer

simulation.file.rewind (::talos::sim::SimFileRewindOp)

Syntax:

operation ::= `simulation.file.rewind` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer

simulation.file.scan_dynamic (::talos::sim::SimFileScanDynamicOp)

Interpret one destination of a dynamic $fscanf format

Syntax:

operation ::= `simulation.file.scan_dynamic` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
finalize	::mlir::BoolAttr	bool attribute
allowed_specifiers	::mlir::IntegerAttr	64-bit signless integer attribute
raw_two_state_bytes	::mlir::IntegerAttr	64-bit signless integer attribute
raw_four_state_bytes	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
format	nullable immutable managed SystemVerilog string
plan_cursor	32-bit signless integer
enabled	32-bit signless integer

Results:

Result	Description
field	nullable immutable managed SystemVerilog string
next_plan_cursor	32-bit signless integer
conversion_kind	32-bit signless integer
ok	32-bit signless integer
eof	32-bit signless integer

simulation.file.scan_field (::talos::sim::SimFileScanFieldOp)

Consume one $fscanf field from the current file position

Syntax:

operation ::= `simulation.file.scan_field` operands attr-dict `:` functional-type(operands, results)

enabled suppresses all file access after an earlier conversion failed. eof distinguishes an input failure from an ordinary matching failure. The %m control conversion matches its prefix and consumes no field bytes.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
specifier	::mlir::IntegerAttr	32-bit signless integer attribute
width	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
enabled	32-bit signless integer

Results:

Result	Description
field	nullable immutable managed SystemVerilog string
ok	32-bit signless integer
eof	32-bit signless integer

simulation.file.scan_raw (::talos::sim::SimFileScanRawOp)

Consume one destination-sized %u or %z raw file field

Syntax:

operation ::= `simulation.file.scan_raw` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
four_state	::mlir::BoolAttr	bool attribute
max_width	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
enabled	32-bit signless integer

Results:

Result	Description
data	fixed-width exact four-state packed value
ok	32-bit signless integer
eof	32-bit signless integer

simulation.file.seek (::talos::sim::SimFileSeekOp)

Syntax:

operation ::= `simulation.file.seek` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
offset	64-bit signless integer
origin	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer

simulation.file.skip_raw (::talos::sim::SimFileSkipRawOp)

Skip an explicitly sized suppressed raw file field

Syntax:

operation ::= `simulation.file.skip_raw` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
byte_count	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer
enabled	32-bit signless integer

Results:

Result	Description
ok	32-bit signless integer
eof	32-bit signless integer

simulation.file.tell (::talos::sim::SimFileTellOp)

Syntax:

operation ::= `simulation.file.tell` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
descriptor	32-bit signless integer

Results:

Result	Description
result	64-bit signless integer

simulation.file.ungetc (::talos::sim::SimFileUngetcOp)

Syntax:

operation ::= `simulation.file.ungetc` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
byte	32-bit signless integer
descriptor	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer

simulation.finish (::talos::sim::SimFinishOp)

Request orderly design-wide simulation termination

Syntax:

operation ::= `simulation.finish` $context `,` $verbosity attr-dict

Records a design-wide finish request with the runtime scheduler. The current activation must return after this operation; the scheduler skips remaining ordinary work and enters the final-process phase.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context
verbosity	32-bit signless integer

simulation.func (::talos::sim::SimFuncOp)

Isolated multi-block simulation code unit

Traits: AutomaticAllocationScope, IsolatedFromAbove, RecursiveMemoryEffects

Interfaces: ArgAndResultAttrsOpInterface, CallableOpInterface, FunctionOpInterface, Symbol

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
function_type	::mlir::TypeAttr	type attribute of function type
entry_kind	::talos::sim::EntryKindAttr	simulation code-unit kind
home_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue
domain	::talos::sim::ExecutionDomainAttr	procedural scheduling domain
sym_visibility	::mlir::StringAttr	string attribute
arg_attrs	::mlir::ArrayAttr	Array of dictionary attributes
res_attrs	::mlir::ArrayAttr	Array of dictionary attributes
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
effect_summary	::mlir::ArrayAttr	compute effect array
fragment_abi	::talos::schedule::FragmentABIAttr
internal	::mlir::UnitAttr	unit attribute

simulation.gc.safepoint (::talos::sim::SimGCSafepointOp)

Precise generated collector safepoint

Syntax:

operation ::= `simulation.gc.safepoint` $context attr-dict `:` type($context)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.logic.binary (::talos::sim::SimLogicBinaryOp)

Syntax:

operation ::= `simulation.logic.binary` $kind $lhs `,` $rhs attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, SameOperandsAndResultType

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::BinaryKindAttr	normalized four-state binary operation

Operands:

Operand	Description
lhs	fixed-width exact four-state packed value
rhs	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.case_difference_mask (::talos::sim::SimLogicCaseDifferenceMaskOp)

Return one bit for every four-state symbol that changed

Syntax:

operation ::= `simulation.logic.case_difference_mask` $lhs `,` $rhs attr-dict `:` functional-type(operands, results)

Compares the value and unknown planes independently and returns their bitwise union. Unlike logic.compare case_ne, the result retains the position of every changed symbol, including X-to-Z and Z-to-X changes.

Traits: AlwaysSpeculatableImplTrait, SameTypeOperands

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	fixed-width exact four-state packed value
rhs	fixed-width exact four-state packed value

Results:

Result	Description
result	integer

simulation.logic.clog2 (::talos::sim::SimLogicClog2Op)

SystemVerilog ceiling base-two logarithm

Syntax:

operation ::= `simulation.logic.clog2` $input attr-dict `:` qualified(type($input))

Converts X and Z bits to zero, then returns the minimum number of bits needed to represent the input minus one. Zero and one return zero. Signed inputs are intentionally interpreted by bit pattern, as required by SystemVerilog $clog2.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferIntRangeInterface, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	32-bit signless integer

simulation.logic.compare (::talos::sim::SimLogicCompareOp)

Syntax:

operation ::= `simulation.logic.compare` $kind $lhs `,` $rhs attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait, SameTypeOperands

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::CompareKindAttr	normalized comparison operation

Operands:

Operand	Description
lhs	fixed-width exact four-state packed value
rhs	fixed-width exact four-state packed value

Results:

Result	Description
result	any type

simulation.logic.concat (::talos::sim::SimLogicConcatOp)

Syntax:

operation ::= `simulation.logic.concat` $inputs attr-dict `:` functional-type($inputs, $result)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
inputs	variadic of fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.constant (::talos::sim::SimLogicConstantOp)

Constant four-state value given as a value and unknown plane

Syntax:

operation ::= `simulation.logic.constant` $value `,` $unknown attr-dict `:` qualified(type($result))

Folds to a two-element ArrayAttr holding the value and unknown planes, which the dialect constant materializer turns back into this operation.

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
value	::mlir::IntegerAttr	arbitrary integer attribute
unknown	::mlir::IntegerAttr	arbitrary integer attribute

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.count_bits (::talos::sim::SimLogicCountBitsOp)

Count selected four-state symbols in a fixed bitstream

Syntax:

operation ::= `simulation.logic.count_bits` $input `matching` $controls attr-dict `:` functional-type(operands, results)

Each one-bit control selects exactly one of 0, 1, X, or Z using the dialect’s value/unknown encoding. Duplicate controls select that state only once. The result is the count modulo 2^32, matching SystemVerilog int.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferIntRangeInterface, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type
controls	variadic of one-bit exact four-state logic

Results:

Result	Description
result	32-bit signless integer

simulation.logic.dyn_extract (::talos::sim::SimLogicDynExtractOp)

Dynamically select a four-state packed slice

Syntax:

operation ::= `simulation.logic.dyn_extract` $input `from` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index may be a signless builtin integer or four-state logic and its bit pattern is interpreted as a signed two’s-complement value. Producers must therefore zero-extend unsigned source indices before normalization so that a positive index cannot be mistaken for a negative one. An unknown index produces all X. For a partially out-of-range selection, in-range bits are preserved and out-of-range bits are X.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	fixed-width exact four-state packed value
low_bit	any type

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.dyn_insert (::talos::sim::SimLogicDynInsertOp)

Dynamically replace a four-state packed slice

Syntax:

operation ::= `simulation.logic.dyn_insert` $replacement `into` $input `at` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index follows the same signed two’s-complement normalization contract as logic.dyn_extract. An unknown or wholly out-of-range index leaves the input unchanged. A partially overlapping replacement updates only the in-range input bits.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	fixed-width exact four-state packed value
replacement	fixed-width exact four-state packed value
low_bit	any type

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.extract (::talos::sim::SimLogicExtractOp)

Syntax:

operation ::= `simulation.logic.extract` $input `from` $low_bit attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
low_bit	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.from_bits (::talos::sim::SimLogicFromBitsOp)

Syntax:

operation ::= `simulation.logic.from_bits` $input attr-dict `:` type($input) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: CastOpInterface, ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	integer

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.insert (::talos::sim::SimLogicInsertOp)

Syntax:

operation ::= `simulation.logic.insert` $replacement `into` $input `at` $low_bit attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
low_bit	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	fixed-width exact four-state packed value
replacement	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.is_true (::talos::sim::SimLogicIsTrueOp)

Evaluate four-state logic as a control-flow predicate

Syntax:

operation ::= `simulation.logic.is_true` $input attr-dict `:` qualified(type($input))

Returns true exactly when at least one input bit is a known one. Zero and values containing only X and Z bits are false, matching SystemVerilog conditional-statement truth evaluation.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	1-bit signless integer

simulation.logic.logical (::talos::sim::SimLogicLogicalOp)

Four-state logical conjunction or disjunction

Syntax:

operation ::= `simulation.logic.logical` $kind $lhs `,` $rhs attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::LogicalKindAttr	four-state logical operation

Operands:

Operand	Description
lhs	fixed-width exact four-state packed value
rhs	fixed-width exact four-state packed value

Results:

Result	Description
result	one-bit exact four-state logic

simulation.logic.mux (::talos::sim::SimLogicMuxOp)

Conditional-expression selection with IEEE X/Z merging

Syntax:

operation ::= `simulation.logic.mux` $condition `?` $true_value `:` $false_value attr-dict `:`
              functional-type(operands, results)

A known condition selects one operand. For an X or Z condition, each result bit is preserved only when both operands contain the same known 0 or 1; every other combination becomes X, as required by IEEE 1800-2017 Table 11-20.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
condition	one-bit exact four-state logic
true_value	fixed-width exact four-state packed value
false_value	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.power (::talos::sim::SimLogicPowerOp)

Four-state integral exponentiation

Syntax:

operation ::= `simulation.logic.power` $base `,` $exponent attr-dict `:` functional-type(operands, results)

Computes the base-width modular power for a nonnegative exponent. The exponent has its own packed width, as required by SystemVerilog. Unknown bits in either operand produce an all-X result; signed negative-exponent selection is represented by the surrounding semantic lowering.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
base	fixed-width exact four-state packed value
exponent	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.reduction (::talos::sim::SimLogicReductionOp)

Four-state packed reduction

Syntax:

operation ::= `simulation.logic.reduction` $kind $input attr-dict `:` qualified(type($input))
              `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::ReductionKindAttr	normalized four-state reduction

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	one-bit exact four-state logic

simulation.logic.replicate (::talos::sim::SimLogicReplicateOp)

Syntax:

operation ::= `simulation.logic.replicate` $input `times` $count attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
count	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.resize (::talos::sim::SimLogicResizeOp)

Widen or narrow a four-state value

Syntax:

operation ::= `simulation.logic.resize` $input `signed` `=` $is_signed attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: CastOpInterface, ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
is_signed	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.shift (::talos::sim::SimLogicShiftOp)

Four-state shift with an independently typed amount

Syntax:

operation ::= `simulation.logic.shift` $kind $input `by` $amount attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::ShiftKindAttr	four-state shift operation

Operands:

Operand	Description
input	fixed-width exact four-state packed value
amount	any type

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.logic.to_bits (::talos::sim::SimLogicToBitsOp)

Convert four-state logic to two-state bits

Syntax:

operation ::= `simulation.logic.to_bits` $input attr-dict `:` qualified(type($input)) `->` type($result)

Performs the SystemVerilog four-state-to-two-state conversion. Every known bit is preserved and every X or Z bit becomes zero.

Traits: AlwaysSpeculatableImplTrait

Interfaces: CastOpInterface, ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	integer

simulation.logic.unary (::talos::sim::SimLogicUnaryOp)

Syntax:

operation ::= `simulation.logic.unary` $kind $input attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::UnaryKindAttr	normalized four-state unary operation

Operands:

Operand	Description
input	fixed-width exact four-state packed value

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.mailbox.create (::talos::sim::SimMailboxCreateOp)

Create a typed bounded or unbounded mailbox

Syntax:

operation ::= `simulation.mailbox.create` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
type_id	::mlir::IntegerAttr	64-bit signless integer attribute
element_kind	::talos::sim::ElementKindAttr	simulation element kind
element_flags	::talos::sim::ElementFlagsAttr	simulation element flags
value_size	::mlir::IntegerAttr	64-bit signless integer attribute
alignment	::mlir::IntegerAttr	64-bit signless integer attribute
bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
trace_offsets	::mlir::DenseI64ArrayAttr	i64 dense array attribute
trace_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
bound	64-bit signless integer

Results:

Result	Description
result	managed typed SystemVerilog mailbox handle

simulation.mailbox.equal (::talos::sim::SimMailboxEqualOp)

Compare nullable mailbox identities with equivalent message types

Syntax:

operation ::= `simulation.mailbox.equal` $lhs `,` $rhs attr-dict `:` qualified(type($lhs))

Traits: AlwaysSpeculatableImplTrait, Commutative, SameTypeOperands

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	managed typed SystemVerilog mailbox handle
rhs	managed typed SystemVerilog mailbox handle

Results:

Result	Description
equal	1-bit signless integer

simulation.mailbox.num (::talos::sim::SimMailboxNumOp)

Return the current number of messages

Syntax:

operation ::= `simulation.mailbox.num` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
mailbox	managed typed SystemVerilog mailbox handle

Results:

Result	Description
result	32-bit signless integer

simulation.mailbox.try_get (::talos::sim::SimMailboxTryGetOp)

Attempt to remove and copy the oldest message

Syntax:

operation ::= `simulation.mailbox.try_get` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
mailbox	managed typed SystemVerilog mailbox handle

Results:

Result	Description
success	1-bit signless integer
value	any type

simulation.mailbox.try_peek (::talos::sim::SimMailboxTryPeekOp)

Attempt to copy the oldest message without removing it

Syntax:

operation ::= `simulation.mailbox.try_peek` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
mailbox	managed typed SystemVerilog mailbox handle

Results:

Result	Description
success	1-bit signless integer
value	any type

simulation.mailbox.try_put (::talos::sim::SimMailboxTryPutOp)

Attempt to append one message without blocking

Syntax:

operation ::= `simulation.mailbox.try_put` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
mailbox	managed typed SystemVerilog mailbox handle
value	any type

Results:

Result	Description
success	1-bit signless integer

simulation.managed.bits_dyn_store (::talos::sim::SimManagedBitsDynStoreOp)

Atomically replace a narrow slice of a wide packed field

Syntax:

operation ::= `simulation.managed.bits_dyn_store` $replacement `into` $reference `at` $low_bit attr-dict `:`
              type($replacement) `,` qualified(type($reference)) `,` type($low_bit)

This native-lowering operation preserves bits.dyn_insert clipping and out-of-range semantics without materializing the complete packed field as one LLVM integer. It is formed only after any bytecode fallback has been frozen.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
replacement	integer
reference	typed managed field reference with an owning object
low_bit	integer

simulation.managed.is_null (::talos::sim::SimManagedIsNullOp)

Test a managed handle for the canonical null value

Syntax:

operation ::= `simulation.managed.is_null` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	1-bit signless integer

simulation.managed.load (::talos::sim::SimManagedLoadOp)

Race-free load through a managed field reference

Syntax:

operation ::= `simulation.managed.load` $reference attr-dict `:` qualified(type($reference))
              `->` type($result)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
reference	typed managed field reference with an owning object

Results:

Result	Description
result	any type

simulation.managed.nba.enqueue (::talos::sim::SimManagedNBAEnqueueOp)

Schedule a nonblocking managed-field update

Syntax:

operation ::= `simulation.managed.nba.enqueue` $value `to` $destination (`after` $delay^)? attr-dict
              `:` functional-type(operands, results)

Captures both the owning object and any managed value as precise heap roots until the scheduler commits the update. The destination is revalidated and written atomically with respect to other managed-field accesses.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
value	any type
destination	typed managed field reference with an owning object
delay	target-independent scaled simulation time

simulation.managed.nba.enqueue_masked (::talos::sim::SimManagedNBAEnqueueMaskedOp)

Schedule a nonblocking partial update of class-backed storage

Syntax:

operation ::= `simulation.managed.nba.enqueue_masked` $value `to` $destination `mask` $mask
              (`after` $delay^)? attr-dict `:` functional-type(operands, results)

IEEE 1800-2023 10.4.2: a nonblocking assignment to a fixed selection of a class property, or of an element of an unpacked-array property reached through a reference path. mask has the destination’s type; the storage bits under its known bits take their values (and unknown bits) from value when the update commits, and the others keep the destination’s value at that time, so other updates in the slot survive.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
value	any type
destination	typed managed field reference with an owning object or managed escaping dynamic-lvalue path
mask	any type
delay	target-independent scaled simulation time

simulation.managed.null (::talos::sim::SimManagedNullOp)

Typed null non-class managed handle

Syntax:

operation ::= `simulation.managed.null` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	any type

simulation.managed.store (::talos::sim::SimManagedStoreOp)

Race-free store through a managed field reference

Syntax:

operation ::= `simulation.managed.store` $value `to` $reference attr-dict `:`
              type($value) `,` qualified(type($reference))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
value	any type
reference	typed managed field reference with an owning object

simulation.managed.watch (::talos::sim::SimManagedWatchOp)

Materialize a precise managed mutation dependency

Syntax:

operation ::= `simulation.managed.watch` $kind $input attr-dict `:` type($input)

A field watch is formed from a managed reference and changes only when the selected field value changes. A container watch is formed from a dynamic array, queue, or associative array and changes whenever the container is mutated. The stable token is scheduler-owned and contains no managed pointer.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::ManagedWatchKindAttr	managed mutation dependency

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	stable runtime token for one managed mutation dependency

simulation.managed.watch.null (::talos::sim::SimManagedWatchNullOp)

Null managed mutation dependency

Syntax:

operation ::= `simulation.managed.watch.null` attr-dict

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	stable runtime token for one managed mutation dependency

simulation.monitor.control (::talos::sim::SimMonitorControlOp)

Enable or disable context-wide SystemVerilog monitor output

Syntax:

operation ::= `simulation.monitor.control` $enabled attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
enabled	::mlir::BoolAttr	bool attribute

simulation.monitor.current (::talos::sim::SimMonitorCurrentOp)

Test whether the executing process is the current monitor

Syntax:

operation ::= `simulation.monitor.current` attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Results:

Result	Description
current	1-bit signless integer

simulation.monitor.register (::talos::sim::SimMonitorRegisterOp)

Replace the context-wide SystemVerilog monitor process

Syntax:

operation ::= `simulation.monitor.register` $process attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
process	opaque scheduler process handle

simulation.nba.enqueue (::talos::sim::SimNBAEnqueueOp)

Syntax:

operation ::= `simulation.nba.enqueue` $value `to` $destination (`after` $delay^)? attr-dict
              `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::NBASiteAttr
clocking_output	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
value	any type
destination	any type
delay	target-independent scaled simulation time

simulation.net.connect.decl (::talos::sim::SimNetConnectDeclOp)

Canonical static bitwise net equivalence run

Syntax:

operation ::= `simulation.net.connect.decl` $id `in` $scope_id $lhs_net_id `[` $lhs_offset `]`
              `to` $rhs_net_id `[` $rhs_offset `]` `width` $width
              `reversed` `=` $rhs_reversed
              (`provenance` $provenance^)?
              (`rhs_dominates` `=` $rhs_dominates^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
lhs_net_id	::mlir::IntegerAttr	64-bit signless integer attribute
lhs_offset	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_net_id	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_offset	::mlir::IntegerAttr	64-bit signless integer attribute
width	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_reversed	::mlir::BoolAttr	bool attribute
provenance	::mlir::StringAttr	string attribute
rhs_dominates	::mlir::BoolAttr	bool attribute

simulation.net.count_drivers (::talos::sim::SimNetCountDriversOp)

Count active scalar-net driver contributions

Syntax:

operation ::= `simulation.net.count_drivers` $net attr-dict `:` qualified(type($net))

Implements the state query underlying IEEE 1800-2017 Annex D.2. The net operand must denote one scalar net bit. Results report whether that bit is forced, followed by the counts of non-Z drivers in total, 0, 1, and x states. Collapsed net components and paired conditional-primitive strength drivers are counted as their logical SystemVerilog drivers.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::NetResource}

Operands:

Operand	Description
net	typed resolved net handle

Results:

Result	Description
forced	32-bit signless integer
total	32-bit signless integer
zero	32-bit signless integer
one	32-bit signless integer
unknown	32-bit signless integer

simulation.net.decl (::talos::sim::SimNetDeclOp)

Immutable resolved-net descriptor

Syntax:

operation ::= `simulation.net.decl` $id `in` $scope_id `:` $type $lifetime
              (`hierarchy` $hierarchical_name^)? (`debug` $debug_name^)? attr-dict

Declares the immutable metadata for a resolved net. propagation_delays contains either one uniform rise/fall/third-delay triple or one triple per packed bit. An all–1 per-bit triple denotes an immediate bit. For a trireg, the third value is charge decay rather than turn-off, and -1 in that slot denotes indefinite charge retention. charge_strength records the Figure 28-2 small/medium/large strength of stored charge and is present only on declared trireg storage.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
lifetime	::talos::sim::LifetimeAttr	simulation object lifetime
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
observability	::talos::schedule::ComputeObservabilityKindAttr	VPI state observability
resolution_kind	::talos::sim::NetResolutionKindAttr	supported net resolution kind
propagation_delays	::mlir::DenseI64ArrayAttr	i64 dense array attribute
charge_strength	::talos::sim::StrengthAttr	signal strength scale position
internal	::mlir::UnitAttr	unit attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
nettype	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.net.extract (::talos::sim::SimNetExtractOp)

Constant packed or exact aggregate-element view into a built-in net

Syntax:

operation ::= `simulation.net.extract` $input `from` $low_bit attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
low_bit	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	typed resolved net handle

Results:

Result	Description
result	typed resolved net handle

simulation.net.mos.drive_delayed (::talos::sim::SimMosDriveDelayedOp)

Publish a strength-preserving inertial MOS contribution

Syntax:

operation ::= `simulation.net.mos.drive_delayed` $pass_switch_id `=` $control `after` `[` $rise_delay
              `,` $fall_delay `,` $turnoff_delay `]` attr-dict `:`
              qualified(type($control))

Samples the resolved strength range at the source of one frozen directed MOS/CMOS edge, applies the normalized active-high four-state control and the edge’s resistive transfer, and schedules that exact contribution inertially. Pending updates are keyed by scalar edge, so source-strength changes that preserve the logical value are not discarded.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
pass_switch_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
control	one-bit exact four-state logic
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.net.pass.control (::talos::sim::SimPassSwitchControlOp)

Publish the four-state enable of a controlled pass switch

Syntax:

operation ::= `simulation.net.pass.control` $pass_switch_id `=` $control attr-dict `:` qualified(type($control))

Updates one frozen pass-switch run. The control is normalized to active high: 1 enables the channel, 0 disables it, and x/z makes connectivity uncertain according to IEEE 1800-2017 28.12.2.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
pass_switch_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
control	one-bit exact four-state logic

simulation.net.pass.control_delayed (::talos::sim::SimPassSwitchControlDelayedOp)

Inertially publish a delayed four-state pass-switch enable

Syntax:

operation ::= `simulation.net.pass.control_delayed` $pass_switch_id `=` $control `after` `[` $turn_on_delay
              `,` $turn_off_delay `,` $unknown_delay `]` attr-dict `:`
              qualified(type($control))

Schedules one frozen controlled pass-switch run. A known active control uses turn_on_delay, a known inactive control uses turn_off_delay, and x/z uses unknown_delay. Re-evaluation of the same pass-switch ID rejects an older pending pulse before its delayed topology state matures.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::NetResource}

Attributes:

Attribute	MLIR Type	Description
pass_switch_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
control	one-bit exact four-state logic
turn_on_delay	target-independent scaled simulation time
turn_off_delay	target-independent scaled simulation time
unknown_delay	target-independent scaled simulation time

simulation.net.pass.decl (::talos::sim::SimPassSwitchDeclOp)

Static bidirectional pass-switch connection run

Syntax:

operation ::= `simulation.net.pass.decl` $id `in` $scope_id $lhs_net_id `[` $lhs_offset `]`
              `to` $rhs_net_id `[` $rhs_offset `]` `width` $width
              `reversed` `=` $rhs_reversed attr-dict

Records a tran, rtran, tranif, or rtranif channel without collapsing the terminal nets into one declaration. A boolean directed attribute extends the same frozen representation to a MOS/CMOS source-to-output channel; its right terminal is the source and its left terminal is the destination. The runtime resolves the electrically connected component together while retaining terminal-local strength and one logical switch contribution at each endpoint for driver introspection.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
lhs_net_id	::mlir::IntegerAttr	64-bit signless integer attribute
lhs_offset	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_net_id	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_offset	::mlir::IntegerAttr	64-bit signless integer attribute
width	::mlir::IntegerAttr	64-bit signless integer attribute
rhs_reversed	::mlir::BoolAttr	bool attribute

simulation.net.read (::talos::sim::SimNetReadOp)

Syntax:

operation ::= `simulation.net.read` $net attr-dict `:` qualified(type($net)) `->` type($result)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::NetResource}

Operands:

Operand	Description
net	typed resolved net handle

Results:

Result	Description
result	any type

simulation.net.write (::talos::sim::SimNetWriteOp)

Atomically publish a user-defined resolved-net value

Syntax:

operation ::= `simulation.net.write` $net `=` $value attr-dict `:` qualified(type($net)) `,` type($value)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::NetResource}

Operands:

Operand	Description
net	typed resolved net handle
value	any type

simulation.observer.bind (::talos::sim::SimObserverBindOp)

Bind an outlined timing evaluator to captures and dependencies

Syntax:

operation ::= `simulation.observer.bind` $evaluator `values` `(` $values `:` type($values) `)`
              `captures` $capture_count
              attr-dict `:` qualified(type($result))

Captures match the evaluator arguments following its implicit context argument. Dependencies are canonical storage, net, or named-event handles whose publications cause the evaluator to run. The operation itself does not evaluate the expression.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
evaluator	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
capture_count	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
values	variadic of any type

Results:

Result	Description
result	bound zero-time computed timing evaluator

simulation.override (::talos::sim::SimOverrideOp)

Publish a whole static scalar force or procedural assign

Syntax:

operation ::= `simulation.override` $target `=` $value `assign` $is_assign attr-dict `:` type($target) `,` type($value)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
is_assign	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
target	any type
value	any type

simulation.packed.flatten (::talos::sim::SimPackedFlattenOp)

View a packed aggregate as its scalar bit representation

Syntax:

operation ::= `simulation.packed.flatten` $input attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: CastOpInterface, ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.packed.unflatten (::talos::sim::SimPackedUnflattenOp)

Form a packed aggregate from its scalar bit representation

Syntax:

operation ::= `simulation.packed.unflatten` $input attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: CastOpInterface, ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.plusarg.parse_logic (::talos::sim::SimPlusargParseLogicOp)

Strictly parse one integral $value$plusargs remainder

Syntax:

operation ::= `simulation.plusarg.parse_logic` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
radix	::talos::sim::RadixAttr	simulation radix

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.plusarg.parse_real (::talos::sim::SimPlusargParseRealOp)

Strictly parse one real $value$plusargs remainder

Syntax:

operation ::= `simulation.plusarg.parse_real` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	64-bit float

simulation.plusarg.scan (::talos::sim::SimPlusargScanOp)

Parse a dynamic $value$plusargs format and return its field

Syntax:

operation ::= `simulation.plusarg.scan` operands attr-dict `:` functional-type(operands, results)

conversion is zero for %s, one for a real conversion, or the numeric radix for an integral conversion. An invalid format returns found zero.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
format	nullable immutable managed SystemVerilog string

Results:

Result	Description
tail	nullable immutable managed SystemVerilog string
conversion	32-bit signless integer
found	32-bit signless integer

simulation.plusarg.test (::talos::sim::SimPlusargTestOp)

Report whether a command-line plusarg starts with a prefix

Syntax:

operation ::= `simulation.plusarg.test` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
name	nullable immutable managed SystemVerilog string

Results:

Result	Description
found	32-bit signless integer

simulation.plusarg.value (::talos::sim::SimPlusargValueOp)

Return the text following a matched command-line plusarg

Syntax:

operation ::= `simulation.plusarg.value` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
prefix	nullable immutable managed SystemVerilog string

Results:

Result	Description
tail	nullable immutable managed SystemVerilog string
found	32-bit signless integer

simulation.port.decl (::talos::sim::SimPortDeclOp)

Immutable module-port reflection descriptor

Syntax:

operation ::= `simulation.port.decl` $id `in` $scope_id `source` $source_id
              `net` `=` $source_is_net `at` $source_low `:` $type $direction
              `ordinal` $ordinal `hierarchy` $hierarchical_name
              (`debug` $debug_name^)? attr-dict

Describes a source-level module port separately from its canonical storage or net. source_low is the fixed packed bit offset into that descriptor. Keeping the alias explicit lets EVCD select only ports while ordinary VCD and executable code continue to use the canonical descriptor.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
source_id	::mlir::IntegerAttr	64-bit signless integer attribute
source_is_net	::mlir::BoolAttr	bool attribute
source_low	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
direction	::talos::sim::PortDirectionAttr	elaborated module-port direction
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection

simulation.process.control (::talos::sim::SimProcessControlOp)

Apply an IEEE control operation to one process object

Syntax:

operation ::= `simulation.process.control` $kind $process `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

This is a control-flow terminator because the target can dynamically name the executing logical process or one of its ancestors. Resuming a process, or controlling another process while the caller survives, transfers immediately to the continuation. Suspending the caller yields and later resumes at that continuation. Killing the caller never reaches it.

A null handle reports a runtime invalid-handle failure. Zero-time function entries may contain this operation; lowering must propagate its control action through the function call chain before coroutine or bytecode materialization.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::ProcessControlKindAttr	process object control kind
site	::talos::schedule::ContinuationSiteAttr

Operands:

Operand	Description
process	opaque scheduler process handle
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.process.current (::talos::sim::SimProcessCurrentOp)

Return the currently executing IEEE process object

Syntax:

operation ::= `simulation.process.current` attr-dict

The logical process identity is stable across task activation boundaries. Native and bytecode implementations may encode the handle differently, but the value remains an opaque !simulation.process in Simulation IR.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Results:

Result	Description
result	opaque scheduler process handle

simulation.process.equal (::talos::sim::SimProcessEqualOp)

Compare two process object identities, including null

Syntax:

operation ::= `simulation.process.equal` $lhs `,` $rhs attr-dict

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	opaque scheduler process handle
rhs	opaque scheduler process handle

Results:

Result	Description
equal	1-bit signless integer

simulation.process.null (::talos::sim::SimProcessNullOp)

Create the null IEEE process object handle

Syntax:

operation ::= `simulation.process.null` attr-dict

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	opaque scheduler process handle

simulation.process.random_state (::talos::sim::SimProcessRandomStateOp)

Read one IEEE process object’s random stream state

Syntax:

operation ::= `simulation.process.random_state` $process attr-dict

Returns the two opaque words comprising the selected process’s random stream. Process identities retain this state after FINISHED or KILLED, so a referenced process tombstone continues to support random-state methods.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Operands:

Operand	Description
process	opaque scheduler process handle

Results:

Result	Description
state	64-bit signless integer
increment	64-bit signless integer

simulation.process.set_random_state (::talos::sim::SimProcessSetRandomStateOp)

Restore one IEEE process object’s random stream state

Syntax:

operation ::= `simulation.process.set_random_state` $process `,` $state `,` $increment attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
process	opaque scheduler process handle
state	64-bit signless integer
increment	64-bit signless integer

simulation.process.status (::talos::sim::SimProcessStatusOp)

Query the IEEE state of one process object

Syntax:

operation ::= `simulation.process.status` $process attr-dict

The i32 result uses the IEEE process::state ordinals: FINISHED=0, RUNNING=1, WAITING=2, SUSPENDED=3, and KILLED=4. Process identities are tombstones: equality and status remain valid after FINISHED or KILLED. Querying a null handle reports a runtime invalid-handle failure.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Operands:

Operand	Description
process	opaque scheduler process handle

Results:

Result	Description
status	32-bit signless integer

simulation.program.exit (::talos::sim::SimProgramExitOp)

Terminate the current program instance

Syntax:

operation ::= `simulation.program.exit` $context attr-dict

Implements IEEE 1800-2017 24.7 $exit. The runtime identifies the program instance from the current logical process, terminates every process in that instance, and finishes the simulation only after every program instance has completed.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.program.owned (::talos::sim::SimProgramOwnedOp)

Test whether the executing thread belongs to a program

Syntax:

operation ::= `simulation.program.owned` $context attr-dict

IEEE 1800-2023 24.7: true when the executing thread, or the thread it descends from, originates in an initial procedure of a program block. $exit terminates that program; any other thread ignores it.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	1-bit signless integer

simulation.publication.batch_begin (::talos::sim::SimPublicationBatchBeginOp)

Begin executing one statement as one event

Syntax:

operation ::= `simulation.publication.batch_begin` $context attr-dict

Brackets, with sim.publication.batch_end, a statement that the process executes as one event (IEEE 1800-2023 4.7): in between there is no time control and no operation that may observe signal values or run another process. The runtime may then deliver the update events of the stores in between together, with the OR of every store’s change and edge masks. That wakes exactly the waiters that per-store publication wakes (9.4.2); while any observer of individual occurrences exists each store still publishes immediately. Batches nest. Merging never changes semantics, so a backend may drop both operations.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.publication.batch_end (::talos::sim::SimPublicationBatchEndOp)

Deliver the update events held since the matching begin

Syntax:

operation ::= `simulation.publication.batch_end` $context attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context

simulation.queue.delete (::talos::sim::SimQueueDeleteOp)

Delete one queue element by logical index

Syntax:

operation ::= `simulation.queue.delete` $queue `[` $index `]` attr-dict `:` qualified(type($queue))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
queue	managed SystemVerilog queue value
index	64-bit signless integer

simulation.queue.insert (::talos::sim::SimQueueInsertOp)

Insert one queue element at a logical index

Syntax:

operation ::= `simulation.queue.insert` $value `into` $queue `[` $index `]` attr-dict `:` qualified(type($queue)) `,` type($value)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
queue	managed SystemVerilog queue value
index	64-bit signless integer
value	any type

simulation.random.bounded (::talos::sim::SimRandomBoundedOp)

Draw an unbiased active-process integer below a bound

Syntax:

operation ::= `simulation.random.bounded` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context
bound	64-bit signless integer

Results:

Result	Description
result	64-bit signless integer

simulation.random.constraint_template (::talos::sim::SimRandomConstraintTemplateOp)

Reusable class-local random constraint dataflow

Syntax:

operation ::= `simulation.random.constraint_template` $sym_name `of` $owner attr-dict-with-keyword $body

Traits: IsolatedFromAbove, NoTerminator, RecursiveMemoryEffects, SingleBlock

Interfaces: SymbolUserOpInterface, Symbol

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
references	::mlir::ArrayAttr	random-value reference array
constraint_blocks	::mlir::ArrayAttr	random-constraint block reference array

simulation.random.constraint_value (::talos::sim::SimRandomConstraintValueOp)

Read one symbolic random constraint template operand

Syntax:

operation ::= `simulation.random.constraint_value` $index attr-dict `:` type($result)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	32-bit signless integer attribute

Results:

Result	Description
result	signless integer

simulation.random.cycle_next (::talos::sim::SimRandomCycleNextOp)

Advance one keyed randc permutation

Syntax:

operation ::= `simulation.random.cycle_next` operands attr-dict `:` functional-type(operands, results)

Maps position through the keyed, width-specific permutation and returns both the next wrapped position and the nonrepeating value. The operation is pure; object-local key and position storage remains explicit in generated simulation IR.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
width	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
key	64-bit signless integer
position	64-bit signless integer

Results:

Result	Description
next_position	64-bit signless integer
value	64-bit signless integer

simulation.random.cycle_sample (::talos::sim::SimRandomCycleSampleOp)

Sample one cyclic field from its exact legal domain

Syntax:

operation ::= `simulation.random.cycle_sample` operands attr-dict `:` functional-type(operands, results)

Specializes a compiler Z3 plan, projects away later random fields, and permutes dense legal ranks for the indicated at-most-32-bit field. Only that field changes in assignment. domain is an opaque managed string containing the exact canonical projected relation. A changed relation restarts the cycle. Returned histories and RNG are tentative; the caller publishes them after the entire randomization succeeds. Soft preferences and explicit ordering of ordinary fields belong to the subsequent solve.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
program	::mlir::StringAttr	string attribute

Operands:

Operand	Description
context	opaque simulator and design context
start	signless integer
mutable_mask	signless integer
constraint_mask	64-bit signless integer
rng_state	64-bit signless integer
rng_increment	64-bit signless integer
key	64-bit signless integer
position	64-bit signless integer
domain	nullable immutable managed SystemVerilog string
field_offset	32-bit signless integer
field_width	32-bit signless integer
captures	variadic of signless integer

Results:

Result	Description
assignment	signless integer
success	1-bit signless integer
next_rng_state	64-bit signless integer
next_key	64-bit signless integer
next_position	64-bit signless integer
next_domain	nullable immutable managed SystemVerilog string

simulation.random.distribution (::talos::sim::SimRandomDistributionOp)

Draw a normative $dist* variate from an explicit seed_

Syntax:

operation ::= `simulation.random.distribution` operands attr-dict `:` functional-type(operands, results)

distribution selects the shape as an talos_rt_distribution value. seed is the IEEE 1800 Annex N inout state. next_seed returns the state after the draw. first and second carry the distribution’s parameters in source order; distributions taking a single parameter ignore second.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
distribution	::talos::sim::RandomDistributionAttr	simulation random distribution

Operands:

Operand	Description
context	opaque simulator and design context
seed	32-bit signless integer
first	32-bit signless integer
second	32-bit signless integer

Results:

Result	Description
result	32-bit signless integer
next_seed	32-bit signless integer

simulation.random.hard_constraint (::talos::sim::SimRandomHardConstraintOp)

Require one template predicate when its block is active

Syntax:

operation ::= `simulation.random.hard_constraint` $predicate `block` $block attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
block	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
predicate	1-bit signless integer

simulation.random.initialization_enter (::talos::sim::SimRandomInitializationEnterOp)

Bind a lexical scope’s initialization random stream

Syntax:

operation ::= `simulation.random.initialization_enter` operands attr-dict `:` functional-type(operands, results)

Startup declarations and static process creation use the IEEE 18.14.1 initialization RNG of their module, interface, program, or package. The nonzero scope ID identifies that elaborated owner. Enter resumes its stream and returns an activation token; leave restores the prior binding. Initialization bindings contain synchronous, zero-time work only.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
scope	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
activation	64-bit signless integer

simulation.random.initialization_leave (::talos::sim::SimRandomInitializationLeaveOp)

Restore the binding preceding initialization RNG entry

Syntax:

operation ::= `simulation.random.initialization_leave` operands attr-dict `:` functional-type(operands, results)

A binding that encloses no operation with memory effects neither draws from the stream nor creates a process or object, so it consumes no value of the initialization RNG (IEEE 1800-2023 18.14.1) and the enter/leave pair folds away.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
context	opaque simulator and design context
activation	64-bit signless integer

simulation.random.legacy (::talos::sim::SimLegacyRandomOp)

Draw the next IEEE Annex N $random value

Syntax:

operation ::= `simulation.random.legacy` operands attr-dict `:` functional-type(operands, results)

Draws from the context-global 32-bit legacy $random stream. This stream is independent of the process-local $urandom state.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	32-bit signless integer

simulation.random.next (::talos::sim::SimRandomNextOp)

Draw the next 64 bits from the active process stream

Syntax:

operation ::= `simulation.random.next` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	64-bit signless integer

simulation.random.real_from_rank (::talos::sim::SimRandomRealFromRankOp)

Decode a finite signed numeric coordinate to an IEEE value

Syntax:

operation ::= `simulation.random.real_from_rank` $rank attr-dict `:` type($rank) `->` type($value)

The integer operand has 279 bits for binary32 or 2100 bits for binary64. It must be within the finite numeric domain. Decoding rounds towards zero at the format’s spacing and retains both zero encodings. The numeric leaf is shared by native and bytecode execution and consumes no random state.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
rank	signless integer

Results:

Result	Description
value	floating-point

simulation.random.real_to_rank (::talos::sim::SimRandomRealToRankOp)

Encode a finite IEEE value as its signed numeric coordinate

Syntax:

operation ::= `simulation.random.real_to_rank` $value attr-dict `:` type($value) `->` type($rank)

Binary32 values use 279 coordinate bits and binary64 values use 2100 bits. Finite values retain their exact canonical coordinate and both signed zero encodings. A NaN or infinity produces a zero coordinate and false finite, allowing source lowering to retain a separate frozen IEEE payload. This operation does not consume any random state.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
value	floating-point

Results:

Result	Description
rank	signless integer
finite	1-bit signless integer

simulation.random.seed (::talos::sim::SimRandomSeedOp)

Seed the active process stream

Syntax:

operation ::= `simulation.random.seed` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context
seed	64-bit signless integer

simulation.random.set_state (::talos::sim::SimRandomSetStateOp)

Restore the active random stream state

Syntax:

operation ::= `simulation.random.set_state` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context
state	64-bit signless integer
increment	64-bit signless integer

simulation.random.soft_constraint (::talos::sim::SimRandomSoftConstraintOp)

Prefer one template predicate with declaration-local order

Syntax:

operation ::= `simulation.random.soft_constraint` $predicate `block` $block `priority` $priority attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
block	::mlir::IntegerAttr	32-bit signless integer attribute
priority	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
predicate	1-bit signless integer

simulation.random.solve (::talos::sim::SimRandomSolveOp)

Execute a compiler-produced residual random constraint plan

Syntax:

operation ::= `simulation.random.solve` $context `from` $start `mutable` $mutable_mask `constraints`
              $constraint_mask `limit` $max_attempts `state` $rng_state `increment`
              $rng_increment `captures` `(` $captures `)`
              $program attr-dict `:` type($context)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource}

Attributes:

Attribute	MLIR Type	Description
program	::mlir::StringAttr	string attribute

Operands:

Operand	Description
context	opaque simulator and design context
start	64-bit signless integer
mutable_mask	64-bit signless integer
constraint_mask	64-bit signless integer
max_attempts	64-bit signless integer
rng_state	64-bit signless integer
rng_increment	64-bit signless integer
captures	variadic of 64-bit signless integer

Results:

Result	Description
assignment	64-bit signless integer
success	1-bit signless integer
next_rng_state	64-bit signless integer

simulation.random.solve_wide (::talos::sim::SimRandomSolveWideOp)

Execute an arbitrary-width residual random constraint plan

Syntax:

operation ::= `simulation.random.solve_wide` operands attr-dict `:` functional-type(operands, results)

This is the arbitrary-width counterpart of random.solve. Packed values stay as ordinary signless integers in Simulation IR; backend lowerings expose them to the runtime through a canonical little-endian array of 64-bit words. The flat-word ABI contains no host-only integer or pointer representation and is suitable for WebAssembly linear memory.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource}

Attributes:

Attribute	MLIR Type	Description
program	::mlir::StringAttr	string attribute

Operands:

Operand	Description
context	opaque simulator and design context
start	signless integer
mutable_mask	signless integer
constraint_mask	64-bit signless integer
max_attempts	64-bit signless integer
rng_state	64-bit signless integer
rng_increment	64-bit signless integer
captures	variadic of signless integer

Results:

Result	Description
assignment	signless integer
success	1-bit signless integer
next_rng_state	64-bit signless integer

simulation.random.state (::talos::sim::SimRandomStateOp)

Read the active random stream state

Syntax:

operation ::= `simulation.random.state` operands attr-dict `:` functional-type(operands, results)

Returns the two opaque words comprising the active process stream, or the initialization stream when no logical process is active.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::RNGResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
state	64-bit signless integer
increment	64-bit signless integer

simulation.real.from_integer (::talos::sim::SimRealFromIntegerOp)

Convert a two-state integer to an IEEE floating value

Syntax:

operation ::= `simulation.real.from_integer` $input `signed` `=` $is_signed attr-dict `:` type($input) `->` type($result)

Converts with IEEE round-to-nearest, ties-to-even semantics. Magnitudes outside the finite result range produce infinity with the source sign.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
is_signed	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	integer

Results:

Result	Description
result	floating-point

simulation.real.to_integer (::talos::sim::SimRealToIntegerOp)

Round an IEEE double to a two-state integer

Syntax:

operation ::= `simulation.real.to_integer` $input `signed` `=` $is_signed attr-dict `:` type($result)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
is_signed	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	64-bit float

Results:

Result	Description
result	integer

simulation.recursive.export_bitstream (::talos::sim::SimRecursiveExportBitstreamOp)

Pack one recursively dynamic source into a fixed bit-stream

Syntax:

operation ::= `simulation.recursive.export_bitstream` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface

Attributes:

Attribute	MLIR Type	Description
plan	::mlir::DenseI64ArrayAttr	i64 dense array attribute
observe	::mlir::UnitAttr	unit attribute
class_allow_hidden_root	::mlir::UnitAttr	unit attribute
class_site_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type
matched	1-bit signless integer
watch	stable runtime token for one managed mutation dependency

simulation.ref.alloc (::talos::sim::SimRefAllocOp)

Promotable automatic local allocation

Syntax:

operation ::= `simulation.ref.alloc` $initial_value attr-dict `:` type($initial_value) `->` qualified(type($result))

Interfaces: DestructurableAllocationOpInterface, PromotableAllocationOpInterface

Operands:

Operand	Description
initial_value	any type

Results:

Result	Description
result	typed mutable storage handle

simulation.ref.array_element (::talos::sim::SimRefArrayElementOp)

Dynamic declared-range view into fixed array storage

Syntax:

operation ::= `simulation.ref.array_element` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

An unknown or out-of-range source index denotes no storage. Loads through the result return the recursive element default and stores have no effect.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SafeMemorySlotAccessOpInterface, ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed mutable storage handle
index	any type

Results:

Result	Description
result	typed mutable storage handle

simulation.ref.copy (::talos::sim::SimRefCopyOp)

Copy a packed reference without materializing its value

Syntax:

operation ::= `simulation.ref.copy` $source `to` $destination attr-dict `:` qualified(type($source))

Traits: SameTypeOperands

Operands:

Operand	Description
source	typed mutable storage handle
destination	typed mutable storage handle

simulation.ref.dyn_extract (::talos::sim::SimRefDynExtractOp)

Dynamically select a packed storage slice

Syntax:

operation ::= `simulation.ref.dyn_extract` $input `from` $low_bit attr-dict `:` functional-type(operands, results)

The low-bit index may be a signless builtin integer or four-state logic. An unknown index denotes no storage, so stores through the result have no effect and loads produce X or zero according to the element domain. Out-of-range bits likewise ignore writes and use the domain fallback on loads, while in-range bits retain their normal storage effects.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SafeMemorySlotAccessOpInterface, ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	typed mutable storage handle
low_bit	any type

Results:

Result	Description
result	typed mutable storage handle

simulation.ref.extract (::talos::sim::SimRefExtractOp)

Syntax:

operation ::= `simulation.ref.extract` $input `from` $low_bit attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), SafeMemorySlotAccessOpInterface, ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
low_bit	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	typed mutable storage handle

Results:

Result	Description
result	typed mutable storage handle

simulation.ref.load (::talos::sim::SimRefLoadOp)

Syntax:

operation ::= `simulation.ref.load` $reference attr-dict `:` qualified(type($reference)) `->` type($result)

Interfaces: DestructurableAccessorOpInterface, InferTypeOpInterface, PromotableMemOpInterface, SafeMemorySlotAccessOpInterface

Operands:

Operand	Description
reference	typed mutable storage handle

Results:

Result	Description
result	any type

simulation.ref.release_owner (::talos::sim::SimRefReleaseOwnerOp)

End an automatic reference ownership lifetime

Syntax:

operation ::= `simulation.ref.release_owner` $reference attr-dict `:` qualified(type($reference))

Marks a control-flow point where the owner reference created by simulation.ref.alloc is no longer live. This internal operation is inserted by lifetime analysis and consumed by native lowering.

Operands:

Operand	Description
reference	typed mutable storage handle

simulation.ref.store (::talos::sim::SimRefStoreOp)

Syntax:

operation ::= `simulation.ref.store` $value `to` $reference attr-dict `:` type($value) `,` qualified(type($reference))

Interfaces: DestructurableAccessorOpInterface, PromotableMemOpInterface, SafeMemorySlotAccessOpInterface

Operands:

Operand	Description
value	any type
reference	typed mutable storage handle

simulation.ref.store_inertial_path (::talos::sim::SimRefStoreInertialPathOp)

Schedule one packed procedural module-path write group

Syntax:

operation ::= `simulation.ref.store_inertial_path` $value `to` $reference `write` $write_mask `active` $active_mask
              `masks` `[` $rise_mask `,` $fall_mask `,` $turnoff_mask `]`
              `after` `[` $rise_delay `,` $fall_delay `,` $turnoff_delay `]`
              `site` $site_id `:` $component `group` $group `of` $group_count
              `nonblocking` `=` $nonblocking
              (`pulse_transitions` $pulse_transition_masks^ `:` type($pulse_transition_masks))?
              attr-dict `:` qualified(type($reference))
              `,` type($value) `,` type($write_mask)

write_mask identifies the bits written by this procedural assignment. active_mask selects the written bits governed by a qualified module path; uncovered bits retain ordinary blocking or NBA region semantics. Groups with one shared site arbitrate and cancel through the same keyed per-bit runtime state used by continuous module-path drivers.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::StorageResource}

Attributes:

Attribute	MLIR Type	Description
site_id	::mlir::IntegerAttr	64-bit signless integer attribute
component	::mlir::IntegerAttr	32-bit signless integer attribute
group	::mlir::IntegerAttr	32-bit signless integer attribute
group_count	::mlir::IntegerAttr	32-bit signless integer attribute
nonblocking	::mlir::BoolAttr	bool attribute
pulse_reject	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_error	::mlir::IntegerAttr	64-bit signless integer attribute
pulse_on_detect	::mlir::BoolAttr	bool attribute
pulse_show_cancelled	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
reference	typed mutable storage handle
value	any type
write_mask	signless integer
active_mask	signless integer
rise_mask	signless integer
fall_mask	signless integer
turnoff_mask	signless integer
pulse_transition_masks	signless integer
rise_delay	target-independent scaled simulation time
fall_delay	target-independent scaled simulation time
turnoff_delay	target-independent scaled simulation time

simulation.ref.subelement (::talos::sim::SimRefSubelementOp)

Static declaration-order view into aggregate storage

Syntax:

operation ::= `simulation.ref.subelement` $input `[` $indices `]` attr-dict `:` qualified(type($input)) `->` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, DestructurableAccessorOpInterface, NoMemoryEffect (MemoryEffectOpInterface), SafeMemorySlotAccessOpInterface, ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
indices	::mlir::DenseI64ArrayAttr	i64 dense array attribute

Operands:

Operand	Description
input	typed mutable storage handle

Results:

Result	Description
result	typed mutable storage handle

simulation.reference_path.aggregate_element (::talos::sim::SimReferencePathAggregateElementOp)

Capture a fixed-aggregate element lvalue for deferred update

Syntax:

operation ::= `simulation.reference_path.aggregate_element` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
left	::mlir::IntegerAttr	64-bit signless integer attribute
right	::mlir::IntegerAttr	64-bit signless integer attribute
element_span	::mlir::IntegerAttr	64-bit signless integer attribute
type_id	::mlir::IntegerAttr	64-bit signless integer attribute
element_kind	::talos::sim::ElementKindAttr	simulation element kind
element_flags	::talos::sim::ElementFlagsAttr	simulation element flags
value_size	::mlir::IntegerAttr	64-bit signless integer attribute
alignment	::mlir::IntegerAttr	64-bit signless integer attribute
bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
trace_offsets	::mlir::DenseI64ArrayAttr	i64 dense array attribute
trace_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
owner_reference	polymorphic exact-alias subroutine reference
index	64-bit signless integer

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.reference_path.aggregate_slice (::talos::sim::SimReferencePathAggregateSliceOp)

Retain a typed bit window within a fixed aggregate reference

Syntax:

operation ::= `simulation.reference_path.aggregate_slice` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
bit_offset	::mlir::IntegerAttr	64-bit signless integer attribute
owner_bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
owner_plane_size	::mlir::IntegerAttr	64-bit signless integer attribute
owner_four_state	::mlir::BoolAttr	bool attribute
type_id	::mlir::IntegerAttr	64-bit signless integer attribute
element_kind	::talos::sim::ElementKindAttr	simulation element kind
element_flags	::talos::sim::ElementFlagsAttr	simulation element flags
value_size	::mlir::IntegerAttr	64-bit signless integer attribute
alignment	::mlir::IntegerAttr	64-bit signless integer attribute
bit_width	::mlir::IntegerAttr	64-bit signless integer attribute
trace_offsets	::mlir::DenseI64ArrayAttr	i64 dense array attribute
trace_kinds	::mlir::DenseI32ArrayAttr	i32 dense array attribute

Operands:

Operand	Description
context	opaque simulator and design context
owner_reference	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.reference_path.assoc (::talos::sim::SimReferencePathAssocOp)

Capture an escaping associative-array element lvalue

Syntax:

operation ::= `simulation.reference_path.assoc` $context `,` $array `[` $key `]` `watching` $owner_reference attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
array	managed SystemVerilog associative array value
key	any type
owner_reference	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.reference_path.index (::talos::sim::SimReferencePathIndexOp)

Capture an escaping dynamic-array or queue element lvalue

Syntax:

operation ::= `simulation.reference_path.index` $context `,` $container `[` $index `]` (`watching` $owner_reference^)? attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Allocate on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
container	any type
index	64-bit signless integer
owner_reference	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.reference_path.nba.enqueue (::talos::sim::SimReferencePathNBAEnqueueOp)

Schedule a nonblocking dynamic-container element update

Syntax:

operation ::= `simulation.reference_path.nba.enqueue` $value `to` $destination (`after` $delay^)? attr-dict
              `:` functional-type(operands, results)

Captures a managed index path and the right-hand-side value. The scheduler roots the path until commit, then resolves the captured container and index; invalid indices remain no-ops.

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
value	any type
destination	managed escaping dynamic-lvalue path
delay	target-independent scaled simulation time

simulation.reference_path.string_character (::talos::sim::SimReferencePathStringCharacterOp)

Capture a string-character lvalue for deferred update

Syntax:

operation ::= `simulation.reference_path.string_character` $context `,` $string `[` $index `]` `watching` $owner_reference attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
string	nullable immutable managed SystemVerilog string
index	64-bit signless integer
owner_reference	polymorphic exact-alias subroutine reference

Results:

Result	Description
result	managed escaping dynamic-lvalue path

simulation.release_override (::talos::sim::SimReleaseOverrideOp)

Release a whole static scalar force or procedural assign

Syntax:

operation ::= `simulation.release_override` $target `assign` $is_assign attr-dict `:` type($target)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
is_assign	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
target	any type

simulation.return (::talos::sim::SimReturnOp)

Return from a simulation code unit

Syntax:

operation ::= `simulation.return` ($operands^ `:` type($operands))? attr-dict

Traits: AlwaysSpeculatableImplTrait, HasParent<SimFuncOp>, ReturnLike, Terminator

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), RegionBranchTerminatorOpInterface

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
operands	variadic of any type

simulation.scan_dynamic_validate (::talos::sim::SimScanDynamicValidateOp)

Preflight one destination of a dynamic scanf format

Syntax:

operation ::= `simulation.scan_dynamic_validate` operands attr-dict `:` functional-type(operands, results)

This operation never consumes input. Lowering threads plan_cursor through every statically typed destination and one finalize operation, ensuring the complete cached format is valid before scanning begins. file selects $fscanf rather than $sscanf diagnostics.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
file	::mlir::BoolAttr	bool attribute
finalize	::mlir::BoolAttr	bool attribute
allowed_specifiers	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
format	nullable immutable managed SystemVerilog string
plan_cursor	32-bit signless integer

Results:

Result	Description
next_plan_cursor	32-bit signless integer

simulation.scope.decl (::talos::sim::SimScopeDeclOp)

Immutable numeric hierarchy, coverage, and VPI descriptor

Syntax:

operation ::= `simulation.scope.decl` $id (`parent` $parent^)?
              (`hierarchy` $hierarchical_name^)? (`debug` $debug_name^)?
              (`source_definition` $definition_name^)? (`coverage_id` $coverage_id^)?
              (`interface` $interface_type^)? (`vpi_kind` $vpi_kind^)?
              (`definition` $vpi_definition^)?
              (`specialization` $vpi_specialization^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
parent	::mlir::IntegerAttr	64-bit signless integer attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
definition_name	::mlir::StringAttr	string attribute
coverage_id	::mlir::IntegerAttr	64-bit signless integer attribute
interface_type	::mlir::StringAttr	string attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
vpi_definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
vpi_specialization	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.semaphore.create (::talos::sim::SimSemaphoreCreateOp)

Create a semaphore with an initial signed key count

Syntax:

operation ::= `simulation.semaphore.create` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
keys	32-bit signless integer

Results:

Result	Description
result	managed SystemVerilog semaphore handle

simulation.semaphore.equal (::talos::sim::SimSemaphoreEqualOp)

Compare nullable shared semaphore bucket identities

Syntax:

operation ::= `simulation.semaphore.equal` $lhs `,` $rhs attr-dict

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	managed SystemVerilog semaphore handle
rhs	managed SystemVerilog semaphore handle

Results:

Result	Description
equal	1-bit signless integer

simulation.semaphore.put (::talos::sim::SimSemaphorePutOp)

Return keys to a semaphore

Syntax:

operation ::= `simulation.semaphore.put` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
semaphore	managed SystemVerilog semaphore handle
keys	32-bit signless integer

simulation.semaphore.try_get (::talos::sim::SimSemaphoreTryGetOp)

Attempt to obtain semaphore keys without blocking

Syntax:

operation ::= `simulation.semaphore.try_get` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
semaphore	managed SystemVerilog semaphore handle
keys	32-bit signless integer

Results:

Result	Description
success	1-bit signless integer

simulation.spawn (::talos::sim::SimSpawnOp)

Spawn a sibling simulation process with explicit captures

Syntax:

operation ::= `simulation.spawn` $callee `(` $operands `)` attr-dict
              `:` type($operands) `->` qualified(type($process))

A spawn is a call edge that starts an independent logical process instead of executing in the caller. Its operands are the callee’s entry captures; its result is the scheduler handle of the new process, not a callee result.

Interfaces: ArgAndResultAttrsOpInterface, CallOpInterface, InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
callee	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
arg_attrs	::mlir::ArrayAttr	Array of dictionary attributes
res_attrs	::mlir::ArrayAttr	Array of dictionary attributes

Operands:

Operand	Description
operands	variadic of any type

Results:

Result	Description
process	opaque scheduler process handle

simulation.statement.decl (::talos::sim::SimStatementDeclOp)

Immutable VPI statement identity

Syntax:

operation ::= `simulation.statement.decl` $id (`in` $code_unit_id^)? `scope` $scope_id
              `type` $vpi_kind (`parent` $parent_id^)? (`name` $name^)? attr-dict

Describes one elaborated statement occurrence independently of executable fragments and bytecode. The exact callback sites are separate inventory records because one statement (notably for) may have multiple semantic cbStmt points. scope_id is the physical/runtime enclosing scope. The optional code-unit ID owns behavioral statements; scope-owned static statement objects omit it, and their incoming containment relation is the authoritative exact lexical owner (for example, an unbacked generate scope). Statement nesting is represented only by parent_id. Source provenance is retained when the frontend provides it, but does not control whether the statement exists.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
parent_id	::mlir::IntegerAttr	64-bit signless integer attribute
name	::mlir::StringAttr	string attribute
is_scope	::mlir::UnitAttr	unit attribute
is_protected	::mlir::UnitAttr	unit attribute

simulation.statement_site.decl (::talos::sim::SimStatementSiteDeclOp)

Immutable semantic cbStmt callback site

Syntax:

operation ::= `simulation.statement_site.decl` $id `on` $statement_id `phase` $phase attr-dict

Names a semantic callback point on a statement. This is not an executable poll or scheduling effect; a later lowering binds the stable site ID to tier-specific fragment and bytecode locations.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute
phase	::mlir::IntegerAttr	32-bit signless integer attribute

simulation.static.once (::talos::sim::SimStaticOnceOp)

Claim one context-wide static initialization site

Syntax:

operation ::= `simulation.static.once` $id attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
first	1-bit signless integer

simulation.status.check (::talos::sim::SimStatusCheckOp)

Propagate an unexpected runtime failure from a fragment

Syntax:

operation ::= `simulation.status.check` $status attr-dict

Native fragment lowering consumes this operation and routes a non-OK status through the fragment ABI. Expected SystemVerilog sentinel results are selected before this hook and do not use it.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
status

simulation.stochastic_queue (::talos::sim::SimStochasticQueueOp)

Execute one IEEE 1800-2017 20.16 queue operation

Syntax:

operation ::= `simulation.stochastic_queue` operands attr-dict `:` functional-type(operands, results)

action selects initialize, add, remove, full, or exam. The three inputs are exact 32-bit four-state values. Two 64-bit four-state results carry remove’s job/information pair, full’s Boolean result, or exam’s statistic; unused results are X. unit_scale is the number of design-precision ticks per calling-scope time unit and governs time-statistic rounding. status is the queue-operation status from Table 20-11, not a runtime ABI status.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StochasticQueueResource, MemoryEffects::Write on ::talos::sim::StochasticQueueResource, MemoryEffects::Read on ::talos::sim::SchedulerResource}

Attributes:

Attribute	MLIR Type	Description
action	::talos::sim::StochasticQueueActionAttr	simulation stochastic queue action
unit_scale	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
id	fixed-width exact four-state packed value
first	fixed-width exact four-state packed value
second	fixed-width exact four-state packed value

Results:

Result	Description
primary	fixed-width exact four-state packed value
secondary	fixed-width exact four-state packed value
status	32-bit signless integer

simulation.stop (::talos::sim::SimStopOp)

Request batch-mode simulation suspension

Syntax:

operation ::= `simulation.stop` $context `,` $verbosity attr-dict

Talos has no interactive debugger session, so executable batch targets treat this request as orderly successful termination. The distinct operation is preserved through the runtime ABI and bytecode intrinsic so interactive hosts can give it different policy in the future.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context
verbosity	32-bit signless integer

simulation.storage.decl (::talos::sim::SimStorageDeclOp)

Immutable mutable-storage descriptor

Syntax:

operation ::= `simulation.storage.decl` $id `in` $scope_id `:` $type $lifetime
              (`hierarchy` $hierarchical_name^)? (`debug` $debug_name^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
lifetime	::talos::sim::LifetimeAttr	simulation object lifetime
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
observability	::talos::schedule::ComputeObservabilityKindAttr	VPI state observability
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection

simulation.string.case_convert (::talos::sim::SimStringCaseConvertOp)

Apply ASCII upper- or lower-case conversion

Syntax:

operation ::= `simulation.string.case_convert` $input `to_upper` `=` $to_upper attr-dict

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
to_upper	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.compare (::talos::sim::SimStringCompareOp)

Compare two managed strings lexicographically

Syntax:

operation ::= `simulation.string.compare` $lhs `,` $rhs `case_insensitive` `=` $case_insensitive attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
case_insensitive	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
lhs	nullable immutable managed SystemVerilog string
rhs	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	32-bit signless integer

simulation.string.concat (::talos::sim::SimStringConcatOp)

Concatenate managed byte strings

Syntax:

operation ::= `simulation.string.concat` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
inputs	variadic of nullable immutable managed SystemVerilog string

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.format_integer (::talos::sim::SimStringFormatIntegerOp)

Format an integer into a managed string

Syntax:

operation ::= `simulation.string.format_integer` $input `radix` `=` $radix `signed` `=` $is_signed attr-dict

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
radix	::talos::sim::RadixAttr	simulation radix
is_signed	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	64-bit signless integer

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.format_real (::talos::sim::SimStringFormatRealOp)

Format a real into a managed string

Syntax:

operation ::= `simulation.string.format_real` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	64-bit float

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.from_packed (::talos::sim::SimStringFromPackedOp)

Convert a packed value to a managed byte string

Syntax:

operation ::= `simulation.string.from_packed` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.getc (::talos::sim::SimStringGetcOp)

Read one byte, returning zero for an invalid index

Syntax:

operation ::= `simulation.string.getc` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
index	64-bit signless integer

Results:

Result	Description
result	8-bit signless integer

simulation.string.length (::talos::sim::SimStringLengthOp)

Return the byte length of a managed string

Syntax:

operation ::= `simulation.string.length` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	64-bit signless integer

simulation.string.literal (::talos::sim::SimStringLiteralOp)

Materialize an immutable managed byte string

Syntax:

operation ::= `simulation.string.literal` $value attr-dict

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
value	::mlir::StringAttr	string attribute

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.output_format (::talos::sim::SimStringOutputFormatOp)

Format a SystemVerilog output list into a managed string

Syntax:

operation ::= `simulation.string.output_format` $context `(` $items `)`
              `radix` `=` $default_radix `flags` `=` $item_flags attr-dict
              `:` type($items)

This is the result-producing counterpart of display: it applies the $write output-list rules without writing a descriptor. item_flags and the call-site formatting environment have the same representation and semantics as display. Bit 5 marks a literal or managed string as the designated format expression used by $sformat and $sformatf.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
default_radix	::talos::sim::RadixAttr	simulation radix
item_flags	::mlir::DenseI32ArrayAttr	i32 dense array attribute
scope	::mlir::StringAttr	string attribute
library_cell	::mlir::StringAttr	string attribute
time_multiplier	::mlir::IntegerAttr	64-bit signless integer attribute
time_precision	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
items	variadic of any type

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.parse_integer (::talos::sim::SimStringParseIntegerOp)

Parse a managed string using a fixed integer radix

Syntax:

operation ::= `simulation.string.parse_integer` $input `radix` `=` $radix attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
radix	::talos::sim::RadixAttr	simulation radix

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	64-bit signless integer

simulation.string.parse_logic (::talos::sim::SimStringParseLogicOp)

Parse a managed string into four-state integral data

Syntax:

operation ::= `simulation.string.parse_logic` $input `radix` `=` $radix attr-dict `:` qualified(type($result))

Parses at the result’s exact width while preserving x, z, and ? digits in separate value and unknown planes. Power-of-two radices place digits directly; decimal uses bounded word-wise multiply and accumulate.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
radix	::talos::sim::RadixAttr	simulation radix

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	fixed-width exact four-state packed value

simulation.string.parse_real (::talos::sim::SimStringParseRealOp)

Parse a locale-independent real from a managed string

Syntax:

operation ::= `simulation.string.parse_real` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	64-bit float

simulation.string.parse_real_constant (::talos::sim::SimStringParseRealConstantOp)

Convert the real-constant prefix of a managed string

Syntax:

operation ::= `simulation.string.parse_real_constant` operands attr-dict `:` functional-type(operands, results)

Implements str.atoreal() (IEEE 1800-2023 6.16.10): converts the longest prefix of the string that is real-constant syntax (5.7.2), and yields zero when the string starts with no digit. Unlike string.parse_real, the scan accepts no white space, sign or bare decimal point.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	64-bit float

simulation.string.putc (::talos::sim::SimStringPutcOp)

Return a string with one byte conditionally updated

Syntax:

operation ::= `simulation.string.putc` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
index	64-bit signless integer
character	8-bit signless integer

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.repeat (::talos::sim::SimStringRepeatOp)

Repeat a managed byte string a runtime number of times

Syntax:

operation ::= `simulation.string.repeat` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
count	64-bit signless integer

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.scan_dynamic (::talos::sim::SimStringScanDynamicOp)

Interpret one destination of a dynamic $sscanf format

Syntax:

operation ::= `simulation.string.scan_dynamic` operands attr-dict `:` functional-type(operands, results)

The runtime caches the parsed format, consumes preceding suppressed conversions, and returns the next assigned field and its compact conversion_kind. plan_cursor indexes the immutable cached plan. finalize consumes only trailing suppression and literal text. allowed_specifiers has one bit per lower-case letter and provides a targeted runtime type check.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
finalize	::mlir::BoolAttr	bool attribute
allowed_specifiers	::mlir::IntegerAttr	64-bit signless integer attribute
raw_two_state_bytes	::mlir::IntegerAttr	64-bit signless integer attribute
raw_four_state_bytes	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
cursor	32-bit signless integer
format	nullable immutable managed SystemVerilog string
plan_cursor	32-bit signless integer
enabled	32-bit signless integer

Results:

Result	Description
field	nullable immutable managed SystemVerilog string
next_cursor	32-bit signless integer
next_plan_cursor	32-bit signless integer
conversion_kind	32-bit signless integer
ok	32-bit signless integer

simulation.string.scan_field (::talos::sim::SimStringScanFieldOp)

Take one $sscanf conversion’s field out of a string

Syntax:

operation ::= `simulation.string.scan_field` operands attr-dict `:` functional-type(operands, results)

prefix is the format text before the conversion: whitespace in it matches any run of input whitespace including none, and every other character must match exactly. A zero width is unbounded; every other value limits the field to that many input characters. ok is zero when the prefix did not match or an ordinary field was empty, and next_cursor then repeats cursor. The %m control conversion succeeds after matching the prefix and consumes no field bytes; lowering supplies its hierarchy.

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
specifier	::mlir::IntegerAttr	32-bit signless integer attribute
width	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
cursor	32-bit signless integer

Results:

Result	Description
field	nullable immutable managed SystemVerilog string
next_cursor	32-bit signless integer
ok	32-bit signless integer

simulation.string.scan_raw (::talos::sim::SimStringScanRawOp)

Scan one destination-sized %u or %z raw field

Syntax:

operation ::= `simulation.string.scan_raw` operands attr-dict `:` functional-type(operands, results)

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
four_state	::mlir::BoolAttr	bool attribute
max_width	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
cursor	32-bit signless integer

Results:

Result	Description
data	fixed-width exact four-state packed value
next_cursor	32-bit signless integer
ok	32-bit signless integer

simulation.string.skip_raw (::talos::sim::SimStringSkipRawOp)

Skip an explicitly sized suppressed %u or %z raw field

Syntax:

operation ::= `simulation.string.skip_raw` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Attributes:

Attribute	MLIR Type	Description
prefix	::mlir::StringAttr	string attribute
byte_count	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
cursor	32-bit signless integer

Results:

Result	Description
next_cursor	32-bit signless integer
ok	32-bit signless integer

simulation.string.substr (::talos::sim::SimStringSubstrOp)

Return an inclusive byte substring

Syntax:

operation ::= `simulation.string.substr` operands attr-dict `:` functional-type(operands, results)

Traits: SimAllocatesManagedStorage

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string
left	64-bit signless integer
right	64-bit signless integer

Results:

Result	Description
result	nullable immutable managed SystemVerilog string

simulation.string.to_packed (::talos::sim::SimStringToPackedOp)

Convert a managed byte string to a two-state packed value

Syntax:

operation ::= `simulation.string.to_packed` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	integer

simulation.string.to_packed_exact (::talos::sim::SimStringToPackedExactOp)

Pack a managed byte string and report an exact width match

Syntax:

operation ::= `simulation.string.to_packed_exact` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	integer
matched	1-bit signless integer

simulation.suspend.any (::talos::sim::SimSuspendAnyOp)

Suspend until any watched handle observes its requested edge

Syntax:

operation ::= `simulation.suspend.any` $values `edges` $edges `to` $continuation
              attr-dict `:` type($values)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
edges	::mlir::DenseI32ArrayAttr	i32 dense array attribute
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.await (::talos::sim::SimSuspendAwaitOp)

Suspend until the awaited process terminates

Syntax:

operation ::= `simulation.suspend.await` $process `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Resumes once the target process has finished, whether it terminated normally or was killed. This is used for an explicit task/process await; fork/join synchronization uses suspend.join.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
process	opaque scheduler process handle
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.change (::talos::sim::SimSuspendChangeOp)

Syntax:

operation ::= `simulation.suspend.change` $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict `:` type($watched)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
watched	any type
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.children (::talos::sim::SimSuspendChildrenOp)

Suspend until every current direct child has terminated

Syntax:

operation ::= `simulation.suspend.children` `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.clock_set (::talos::sim::SimSuspendClockSetOp)

Suspend on an exact set of frozen clock occurrences

Syntax:

operation ::= `simulation.suspend.clock_set` $values `conditions` $condition_count `edges` $edges
              `indices` $condition_indices `site` $occurrence_site
              `to` $continuation attr-dict `:` type($values)

The first edges.size() values are direct signal clock primaries. They are followed by condition_count optional iff handles and then successor operands. condition_indices contains -1 or the condition index for every primary. At most 64 primaries are accepted. The runtime groups all matched primaries from one exact scheduler publication wave into an occurrence mask without coalescing repeated occurrences in that wave. The optional slot_final marker is reserved for Clause 31 coordinators whose simultaneous-event decision needs every producer region at the current numeric simulation time. It changes scheduler admission only; the occurrence ABI and queue representation remain identical.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
condition_count	::mlir::IntegerAttr	32-bit signless integer attribute
edges	::mlir::DenseI32ArrayAttr	i32 dense array attribute
condition_indices	::mlir::DenseI32ArrayAttr	i32 dense array attribute
condition_predicates	::mlir::DenseI32ArrayAttr	i32 dense array attribute
occurrence_site	::mlir::IntegerAttr	64-bit signless integer attribute
slot_final	::mlir::UnitAttr	unit attribute
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.delay (::talos::sim::SimSuspendDelayOp)

Syntax:

operation ::= `simulation.suspend.delay` $delay `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
timing	::talos::schedule::TimingSiteAttr
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
delay	target-independent scaled simulation time
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.edge (::talos::sim::SimSuspendEdgeOp)

Syntax:

operation ::= `simulation.suspend.edge` $edge $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
edge	::talos::sim::EdgeKindAttr	suspension edge kind
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
watched	any type
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.edge_iff (::talos::sim::SimSuspendEdgeIffOp)

Suspend until a watched event whose level condition is true

Syntax:

operation ::= `simulation.suspend.edge_iff` $edge $watched `iff` $condition `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched) `,` type($condition)

The condition is a directly addressable packed object. The scheduler samples its complete four-state value when the primary event occurs and latches a successful occurrence for the waiting process. Changes to the condition alone never resume the process. IEEE 1800-2017 9.4.2.3 writes the primary event with an optional edge identifier – its always @(a iff enable == 1) example qualifies a plain value change – so a change edge is as ordinary here as a directed one.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
edge	::talos::sim::EdgeKindAttr	suspension edge kind
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
watched	any type
condition	any type
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.event (::talos::sim::SimSuspendEventOp)

Syntax:

operation ::= `simulation.suspend.event` $event `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
event	opaque scheduler event handle
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.event_order (::talos::sim::SimSuspendEventOrderOp)

Suspend until named events occur in source order or fail

Syntax:

operation ::= `simulation.suspend.event_order` $values `events` $event_count `to` $continuation
              attr-dict `:` type($values)

The first event_count values are event handles in required occurrence order. Remaining values are successor operands. The scheduler observes every event publication synchronously, so an out-of-order occurrence is retained even when several events trigger before the continuation runs.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
event_count	::mlir::IntegerAttr	32-bit signless integer attribute
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.forever (::talos::sim::SimSuspendForeverOp)

Permanently suspend the current logical process

Syntax:

operation ::= `simulation.suspend.forever` `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.join (::talos::sim::SimSuspendJoinOp)

Suspend until all or any child process terminates

Syntax:

operation ::= `simulation.suspend.join` $kind $values `processes` $process_count `to`
              $continuation attr-dict `:` type($values)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::JoinKindAttr	process join mode
process_count	::mlir::IntegerAttr	64-bit signless integer attribute
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.level (::talos::sim::SimSuspendLevelOp)

Suspend until a directly watched packed value becomes true

Syntax:

operation ::= `simulation.suspend.level` $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched)

The scheduler evaluates the complete four-state value after every overlapping store and latches the first true occurrence. This preserves a transient true value even if a later store changes it again before the waiting continuation executes.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
watched	any type
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.mailbox (::talos::sim::SimSuspendMailboxOp)

Suspend until a mailbox can complete a blocking operation

Syntax:

operation ::= `simulation.suspend.mailbox` $mailbox $kind `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` qualified(type($mailbox))

Suspends on the mailbox’s not-empty or not-full predicate. The mailbox must also be passed to the continuation, which keeps the managed handle in the canonical process frame and therefore rooted while the process waits.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
kind	::talos::sim::MailboxWaitKindAttr	mailbox readiness predicate
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
mailbox	managed typed SystemVerilog mailbox handle
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.observe (::talos::sim::SimSuspendObserveOp)

Suspend on source-ordered computed timing clauses

Syntax:

operation ::= `simulation.suspend.observe` $values `conditions` $condition_count `edges` $edges
              `indices` $condition_indices `to` $continuation attr-dict
              `:` type($values)

Each primary observer has one encounter-time initial value and requested edge. condition_indices has one entry per primary: -1 denotes no iff, otherwise the entry indexes the condition observer list. Conditions are evaluated only after their corresponding primary occurrence.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
condition_count	::mlir::IntegerAttr	32-bit signless integer attribute
edges	::mlir::DenseI32ArrayAttr	i32 dense array attribute
condition_indices	::mlir::DenseI32ArrayAttr	i32 dense array attribute
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.suspend.semaphore (::talos::sim::SimSuspendSemaphoreOp)

Suspend for a FIFO semaphore acquisition

Syntax:

operation ::= `simulation.suspend.semaphore` $keys `from` $semaphore `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($semaphore)

Suspends until this waiter is at the head of the semaphore’s FIFO wait order and the scheduler has atomically obtained the requested keys for it. The handle and key count are copied into the runtime wait record, which is a precise GC root and remains stable across suspension.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
site	::talos::schedule::ContinuationSiteAttr
resume_region	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:

Operand	Description
semaphore	managed SystemVerilog semaphore handle
keys	32-bit signless integer
continuation_operands	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.system (::talos::sim::SimSystemOp)

Execute a host command and return its exit status

Syntax:

operation ::= `simulation.system` operands attr-dict `:` functional-type(operands, results)

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
command	nullable immutable managed SystemVerilog string

Results:

Result	Description
result	32-bit signless integer

simulation.task.call (::talos::sim::SimTaskCallOp)

Transfer the current logical process into a task activation

Syntax:

operation ::= `simulation.task.call` $callee `(` $values `)` `arguments`
              $argument_count `to` $continuation attr-dict `:` type($values)

The argument prefix initializes the callee activation. The remaining operands are forwarded to the caller continuation after the task returns. Output destinations are explicit reference arguments in the callee signature, so a suspended task never retains native caller addresses.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
callee	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
argument_count	::mlir::IntegerAttr	64-bit signless integer attribute
site	::talos::schedule::ContinuationSiteAttr

Operands:

Operand	Description
values	variadic of any type

Successors:

Successor	Description
continuation	any successor

simulation.termination.requested (::talos::sim::SimTerminationRequestedOp)

Test whether design-wide termination has been requested

Syntax:

operation ::= `simulation.termination.requested` $context attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	1-bit signless integer

simulation.time.add (::talos::sim::SimTimeAddOp)

Syntax:

operation ::= `simulation.time.add` $lhs `,` $rhs attr-dict

Traits: AlwaysSpeculatableImplTrait, Commutative, SameOperandsAndResultType

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	target-independent scaled simulation time
rhs	target-independent scaled simulation time

Results:

Result	Description
result	target-independent scaled simulation time

simulation.time.constant (::talos::sim::SimTimeConstantOp)

Nonnegative time measured in design-precision ticks

Syntax:

operation ::= `simulation.time.constant` $value attr-dict

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
value	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
result	target-independent scaled simulation time

simulation.time.format (::talos::sim::SimTimeFormatOp)

Install the design-wide %t display format

Syntax:

operation ::= `simulation.time.format` operands attr-dict `:` functional-type(operands, results)

units is the decimal exponent in seconds of the unit %t reports in. width is a minimum field width covering the rendered suffix.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::IOResource}

Operands:

Operand	Description
context	opaque simulator and design context
units	32-bit signless integer
fraction_digits	32-bit signless integer
suffix	immutable literal byte sequence
width	32-bit signless integer

simulation.time.from_real (::talos::sim::SimTimeFromRealOp)

Convert a realtime delay to design-precision ticks

Syntax:

operation ::= `simulation.time.from_real` $input `by` $scale `quantum` $quantum attr-dict

Rounds a nonnegative delay to the nearest source-precision quantum, with ties rounded upward, and then expresses it in design-precision ticks. NaN and negative inputs produce zero. Positive infinity and finite overflow saturate to the largest quantum-aligned value representable in 64 bits.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
scale	::mlir::IntegerAttr	64-bit signless integer attribute
quantum	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	64-bit float

Results:

Result	Description
result	target-independent scaled simulation time

simulation.time.now (::talos::sim::SimTimeNowOp)

Read the scheduler clock in design-precision ticks

Syntax:

operation ::= `simulation.time.now` $context attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Operands:

Operand	Description
context	opaque simulator and design context

Results:

Result	Description
result	64-bit signless integer

simulation.time.scale (::talos::sim::SimTimeScaleOp)

Scale a dynamic packed delay into design-precision ticks

Syntax:

operation ::= `simulation.time.scale` $input `by` $scale `signed` `=` $is_signed attr-dict
              `:` type($input)

The input is normalized to an unsigned i64 before this operation. Frontend lowering is responsible for mapping unknown and negative values to zero and for proving that multiplication by the positive scale cannot overflow the supported simulation-time range.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
scale	::mlir::IntegerAttr	64-bit signless integer attribute
is_signed	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
input	64-bit signless integer

Results:

Result	Description
result	target-independent scaled simulation time

simulation.time.scan_scale (::talos::sim::SimTimeScanScaleOp)

Scale a %t input field through the current time format

Syntax:

operation ::= `simulation.time.scan_scale` $context `,` $input `time_multiplier` `=` $time_multiplier
              `time_precision` `=` $time_precision attr-dict

time_multiplier is the invoking scope’s time unit in design-precision ticks. time_precision is the decimal exponent in seconds of one such tick. The design-wide $timeformat state selects the input unit and decimal rounding; without an override, design-precision units and zero fractional digits apply.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::IOResource}

Attributes:

Attribute	MLIR Type	Description
time_multiplier	::mlir::IntegerAttr	64-bit signless integer attribute
time_precision	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:

Operand	Description
context	opaque simulator and design context
input	64-bit float

Results:

Result	Description
result	64-bit float

simulation.time.to_real (::talos::sim::SimTimeToRealOp)

Convert design-precision ticks to a realtime value

Syntax:

operation ::= `simulation.time.to_real` $input `by` $scale attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
scale	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	64-bit signless integer

Results:

Result	Description
result	64-bit float

simulation.union.construct (::talos::sim::SimUnionConstructOp)

Construct a union with one selected field

Syntax:

operation ::= `simulation.union.construct` $value `as` $index attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
value	any type

Results:

Result	Description
result	any type

simulation.union.extract (::talos::sim::SimUnionExtractOp)

Extract one statically selected union field

Syntax:

operation ::= `simulation.union.extract` $input `[` $index `]` attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	any type

simulation.union.is_active (::talos::sim::SimUnionIsActiveOp)

Test the active member of a tagged union

Syntax:

operation ::= `simulation.union.is_active` $input `[` $index `]` attr-dict `:` type($input)

Returns false when the requested member is inactive or when the encoded tag is unknown or invalid.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
index	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
input	any type

Results:

Result	Description
result	1-bit signless integer

simulation.virtual_interface.bind (::talos::sim::SimVirtualInterfaceBindOp)

Bind an elaborated interface instance as a virtual handle

Syntax:

operation ::= `simulation.virtual_interface.bind` $scope_id attr-dict `:` qualified(type($result))

Produces the stable scope identity of an elaborated interface instance. Zero is reserved for null; consequently every bind scope must be nonzero.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:

Attribute	MLIR Type	Description
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute

Results:

Result	Description
result	nullable statically typed virtual interface handle

simulation.virtual_interface.cast (::talos::sim::SimVirtualInterfaceCastOp)

Change the static modport view of a virtual interface

Syntax:

operation ::= `simulation.virtual_interface.cast` $input attr-dict `:` qualified(type($input)) `to` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable statically typed virtual interface handle

Results:

Result	Description
result	nullable statically typed virtual interface handle

simulation.virtual_interface.equal (::talos::sim::SimVirtualInterfaceEqualOp)

Compare virtual interface identities, including null

Syntax:

operation ::= `simulation.virtual_interface.equal` $lhs `,` $rhs attr-dict `:` qualified(type($lhs)) `,`
              qualified(type($rhs))

Traits: AlwaysSpeculatableImplTrait, Commutative

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
lhs	nullable statically typed virtual interface handle
rhs	nullable statically typed virtual interface handle

Results:

Result	Description
equal	1-bit signless integer

simulation.virtual_interface.null (::talos::sim::SimVirtualInterfaceNullOp)

Typed null virtual interface handle

Syntax:

operation ::= `simulation.virtual_interface.null` attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait, ConstantLike

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Results:

Result	Description
result	nullable statically typed virtual interface handle

simulation.virtual_interface.scope (::talos::sim::SimVirtualInterfaceScopeOp)

Project a virtual interface handle to its elaborated scope ID

Syntax:

operation ::= `simulation.virtual_interface.scope` $input attr-dict `:` qualified(type($input))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, InferTypeOpInterface, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:

Operand	Description
input	nullable statically typed virtual interface handle

Results:

Result	Description
result	64-bit signless integer

simulation.vpi.call.finish (::talos::sim::SimVPICallFinishOp)

Finish a consumed or cancelled source-call ticket

Syntax:

operation ::= `simulation.vpi.call.finish` $runtime_context `,` $ticket attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
runtime_context	opaque simulator and design context
ticket	64-bit signless integer

simulation.vpi.call.observation (::talos::sim::SimVPICallObservationOp)

Retain exact source frame borrows across a synchronous call

Syntax:

operation ::= `simulation.vpi.call.observation` `(` $observed `:` type($observed) `)` attr-dict

This temporary source-lowering inventory immediately follows one exact synchronous call. Its references are the observations active at that call occurrence. Exceptional-return propagation consumes it to place an observation_end on each actual abnormal exit; normal paths retain their frame.leave endpoints. It must disappear before backend lowering.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
ending_targets	::mlir::ArrayAttr	array attribute

Operands:

Operand	Description
observed	variadic of typed mutable storage handle

simulation.vpi.call.prepare (::talos::sim::SimVPICallPrepareOp)

Prepare one exact source call without entering its callee

Syntax:

operation ::= `simulation.vpi.call.prepare` $runtime_context `from` $call attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
call	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

Results:

Result	Description
ticket	64-bit signless integer

simulation.vpi.frame.bind (::talos::sim::SimVPIFrameBindOp)

Bind an exact automatic local declaration to its live storage

Syntax:

operation ::= `simulation.vpi.frame.bind` $context `,` $reference `to` $declaration attr-dict `:` qualified(type($reference))

The reference names an owned automatic allocation of the declaration’s exact normalized type. The active frame must own that declaration’s lexical scope. This establishes a weak observation binding: it neither initializes the source variable nor retains its storage or managed values. Source lowering keeps the allocation’s observation borrow alive through the corresponding frame exit. Ref/inout aliases require their own explicit alias representation and must not be passed as owned local allocations.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:

Attribute	MLIR Type	Description
declaration	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

Operands:

Operand	Description
context	opaque simulator and design context
reference	typed mutable storage handle

simulation.vpi.frame.checkpoint (::talos::sim::SimVPIFrameCheckpointOp)

Record the exact current source statement or its unavailability

Syntax:

operation ::= `simulation.vpi.frame.checkpoint` $runtime_context `statement` $statement_id attr-dict

Positive IDs identify exact statements in the current lexical code unit. Zero explicitly clears unavailable current-statement metadata rather than leaving an earlier statement falsely current. A later positive checkpoint restores exact identity.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

simulation.vpi.frame.enter (::talos::sim::SimVPIFrameEnterOp)

Enter an exact root or nested statement scope

Syntax:

operation ::= `simulation.vpi.frame.enter` $runtime_context `unit` $code_unit_id (`within` $statement_id^)? attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

Results:

Result	Description
activation	64-bit signless integer

simulation.vpi.frame.enter_foreign (::talos::sim::SimVPIFrameEnterForeignOp)

Enter an exact imported callable whose body is foreign

Syntax:

operation ::= `simulation.vpi.frame.enter_foreign` $runtime_context `from` $call `unit` $code_unit_id attr-dict

Consumes a prepared source call around an inlined DPI import ABI boundary. The callable has an exact code-unit-to-source-scope binding, but no SV body in which to emit an ordinary callee prologue. Physical transport is always synchronous Function, including a source DPI task.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::InventoryResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
call	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

Results:

Result	Description
activation	64-bit signless integer

simulation.vpi.frame.enter_prepared (::talos::sim::SimVPIFrameEnterPreparedOp)

Enter the prepared activation from its callee prologue

Syntax:

operation ::= `simulation.vpi.frame.enter_prepared` $runtime_context `unit` $code_unit_id attr-dict

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
is_task	::mlir::BoolAttr	bool attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

Results:

Result	Description
activation	64-bit signless integer

simulation.vpi.frame.leave (::talos::sim::SimVPIFrameLeaveOp)

End a procedural activation and its local observation borrows

Syntax:

operation ::= `simulation.vpi.frame.leave` $runtime_context `,` $activation
              (`observing` `(` $observed^ `:` type($observed) `)`)? attr-dict

Observed references are lexical observation-borrow endpoints. They keep actual automatic owners live through this activation’s query lifetime and must survive ownership planning; they do not extend the runtime lifetime after the frame leaves. Nonlocal disable ends observation at its control operation instead of executing a second leave on an unwound activation.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
runtime_context	opaque simulator and design context
activation	64-bit signless integer
observed	variadic of typed mutable storage handle

simulation.vpi.frame.observation_end (::talos::sim::SimVPIFrameObservationEndOp)

End local observation borrows on an already unwound exit

Syntax:

operation ::= `simulation.vpi.frame.observation_end` (`(` $observed^ `:` type($observed) `)`)? attr-dict

A nonlocal disable or process termination may already have destroyed the observed activation, so the exit must not execute frame.leave again. This operation ends that activation’s outstanding local observation borrows at the exact exceptional CFG exit. It keeps their real Ref owners live until owner-release planning consumes these endpoints; native and bytecode lowering then erase the marker without retaining or reading runtime state.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Operands:

Operand	Description
observed	variadic of typed mutable storage handle

simulation.vpi.resolution.prepare (::talos::sim::SimVPIResolutionPrepareOp)

Prepare the exact net-origin activation of its resolver

Syntax:

operation ::= `simulation.vpi.resolution.prepare` $runtime_context `net` $net_id attr-dict

The net’s retained nettype and resolution-function binding determine the callee. Net ID zero is valid. The generated caller does not acquire a frame; the resolution function consumes the ticket in its ordinary prologue.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:

Attribute	MLIR Type	Description
net_id	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:

Operand	Description
runtime_context	opaque simulator and design context

Results:

Result	Description
ticket	64-bit signless integer

simulation.vpi_box_type.decl (::talos::sim::SimVPIBoxTypeDeclOp)

Immutable exact source type and storage layout for boxed values

Syntax:

operation ::= `simulation.vpi_box_type.decl` $sym_name `id` $id `:` $value_type attr-dict

A positive stable ID binds a boxed runtime value to its exact source semantics and normalized element storage type. This is a typed descriptor, not a source VPI object. Its semantic and physical DAGs use the ordinary reflection image graphs. No source type may be inferred from the executable element type ID. The declaration survives executable symbol optimization.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
value_type	::mlir::TypeAttr	any type attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection

simulation.vpi_call.decl (::talos::sim::SimVPICallDeclOp)

Immutable identity of one source task/function call

Syntax:

operation ::= `simulation.vpi_call.decl` $sym_name `id` $id `in` $code_unit_id `scope`
              $scope_id `type` $vpi_kind `name` $name
              (`statement` $statement_id^)? (`within` $enclosing_statement_id^)?
              (`callee` $callee_code_unit_id^)? attr-dict

Identifies the actual call occurrence independently of executable clones. A discarded call may alias its existing statement identity. Calls nested within another expression have independent unnamed expression identities; they never acquire a fabricated statement-containment edge. The enclosing statement provides lexical context only. The optional callee code-unit ID identifies a statically resolved source declaration, not a dynamic override.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
name	::mlir::StringAttr	string attribute
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute
enclosing_statement_id	::mlir::IntegerAttr	64-bit signless integer attribute
callee_code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
is_indirect	::mlir::UnitAttr	unit attribute

simulation.vpi_callable.decl (::talos::sim::SimVPICallableDeclOp)

Original callable ABI and interface export provenance

Syntax:

operation ::= `simulation.vpi_callable.decl` $code_unit_id `signature` $signature
              `directions` $directions (`member` $interface_member^)? attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
signature	::mlir::TypeAttr	type attribute of function type
directions	::mlir::DenseI32ArrayAttr	i32 dense array attribute
interface_member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
interface_exports	::mlir::DenseI64ArrayAttr	i64 dense array attribute
is_fork_join	::mlir::UnitAttr	unit attribute

simulation.vpi_class_call_dispatch (::talos::sim::SimVPIClassCallDispatchOp)

Exact receiver type and method of a reflected virtual call

Syntax:

operation ::= `simulation.vpi_class_call_dispatch` $call `on` $receiver_type `via` $method attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
call	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
receiver_type	::mlir::TypeAttr	type attribute of nullable statically typed managed class handle
method	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_class_extends.decl (::talos::sim::SimVPIClassExtendsDeclOp)

Immutable source class extends occurrence

Syntax:

operation ::= `simulation.vpi_class_extends.decl` $sym_name `id` $id `in` $scope_id `owner` $owner attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
base_typespec	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
unavailable_base	::mlir::StringAttr	string attribute
unavailable_arguments	::mlir::StringAttr	string attribute

simulation.vpi_class_member.decl (::talos::sim::SimVPIClassMemberDeclOp)

Immutable class property declaration and executable binding

Syntax:

operation ::= `simulation.vpi_class_member.decl` $sym_name `id` $id `in` $scope_id `owner` $owner (`field` $field^)?
              `hierarchy` $hierarchical_name `debug` $debug_name attr-dict

Separates a lexical or specialized property declaration from its live receiver. owner names a class-definition anchor or canonical class typespec; an optional field names the exact executable class field. A declaration without a field is lexical: it has an exact concrete source type and a ClassDefn owner, but no executable value or backing. The source ID shares the VPI anchor inventory namespace. A static property names its existing storage or named event; instance properties use the class field’s native offset. This operation never allocates executable state.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
field	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
static_storage	::mlir::IntegerAttr	64-bit signless integer attribute
static_event	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_class_parameter_assign.decl (::talos::sim::SimVPIClassParameterAssignDeclOp)

Source class parameter assignment with exact RHS provenance

Syntax:

operation ::= `simulation.vpi_class_parameter_assign.decl` $sym_name `id` $id `in` $scope_id `owner` $owner `parameter` $parameter
              `ordinal` $ordinal attr-dict

The Lhs is a parameter of the lexical class named by owner’s definition. An explicit rhs names its exact source expression or type. An explicit unsupported RHS retains unavailable_rhs; with neither attribute, Rhs shares the formal declaration’s original Expr. is_named preserves named syntax, including an empty named actual selecting the original default. No assignment substitutes an elaborated value. The ordinal is dense in declaration order among non-local parameters.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
parameter	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
rhs	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
unavailable_rhs	::mlir::StringAttr	string attribute
is_named	::mlir::UnitAttr	unit attribute

simulation.vpi_code_unit_scope.bind (::talos::sim::SimVPICodeUnitScopeBindingOp)

Source callable scope of an internal executable code unit

Syntax:

operation ::= `simulation.vpi_code_unit_scope.bind` $code_unit_id `to` $source attr-dict

Connects an executable ABI helper to the exact source task or function it implements. The source anchor retains its own public identity; the helper never becomes a second public callable. This declaration is independent of any call occurrence or runtime activation.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
source	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_definition.bind (::talos::sim::SimVPIDefinitionBindingOp)

Bind an exact primitive instance to its shared definition

Syntax:

operation ::= `simulation.vpi_definition.bind` $source `to` $definition attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
source	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_definition.decl (::talos::sim::SimVPIDefinitionDeclOp)

Shared source definition identity for VPI instances

Syntax:

operation ::= `simulation.vpi_definition.decl` $sym_name `type` $vpi_kind `name` $definition_name
              (`definition_loc` $definition_loc^)?
              (`primitive_type` $primitive_type^)? attr-dict

Preserves one source module, interface, program, or built-in primitive definition independently of its elaborated instances. Definition-invariant VPI metadata can therefore be serialized once and reached through compact instance bindings. This is reflection inventory only and never participates in executable scheduling.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
definition_name	::mlir::StringAttr	string attribute
definition_loc	::mlir::LocationAttr	location attribute
primitive_type	::mlir::IntegerAttr	32-bit signless integer attribute

simulation.vpi_definition_member.bind (::talos::sim::SimVPIDefinitionMemberInstanceBindingOp)

Instance-specific endpoint of a shared VPI member

Syntax:

operation ::= `simulation.vpi_definition_member.bind` `scope` $scope_id `member` $member `expr` $expr_target attr-dict

Associates a definition-owned member with its elaborated expression endpoint in one numeric scope. The image stores these as a dense compact slice per definition binding; no declaration or type metadata is cloned.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
expr_target	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object

simulation.vpi_definition_member.decl (::talos::sim::SimVPIDefinitionMemberDeclOp)

Shared source declaration owned by a VPI definition

Syntax:

operation ::= `simulation.vpi_definition_member.decl` $sym_name `of` $definition `type` $vpi_kind `ordinal` $ordinal
              `name` $member_name (`direction` $direction^)? attr-dict

Stores definition-invariant declaration identity once. Elaborated scopes reach the member through their definition binding; specialization-specific type and value metadata is carried by separate compact bindings. These ops are cold reflection inventory and never participate in scheduling.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
ordinal	::mlir::IntegerAttr	32-bit signless integer attribute
member_name	::mlir::StringAttr	string attribute
direction	::talos::sim::VPIIODirectionAttr	source IO-declaration direction
is_local_param	::mlir::UnitAttr	unit attribute
has_explicit_parameter_range	::mlir::UnitAttr	unit attribute
unavailable_default	::mlir::UnitAttr	unit attribute
has_original_default	::mlir::UnitAttr	unit attribute
param_assign_by_name	::mlir::UnitAttr	unit attribute
param_assign_type	::mlir::UnitAttr	unit attribute
param_assign_default	::mlir::UnitAttr	unit attribute
unavailable_rhs	::mlir::UnitAttr	unit attribute
has_original_rhs	::mlir::UnitAttr	unit attribute

simulation.vpi_definition_member.relation (::talos::sim::SimVPIDefinitionMemberInstanceRelationOp)

Instance-specific relation from a synthetic VPI member

Syntax:

operation ::= `simulation.vpi_definition_member.relation` `scope` $scope_id `member` $member `selector` $selector $mode
              `ordinal` $ordinal `to` $target attr-dict

Preserves a sparse relation whose source is the allocation-free VPI cursor formed from scope_id and member. This keeps high-connection provenance distinct even when multiple reference formals ultimately alias the same simulated storage. The inventory is cold and never participates in executable scheduling.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
selector	::mlir::IntegerAttr	32-bit signless integer attribute
mode	::talos::sim::VPIRelationModeAttr	VPI relation access mode
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
target	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object

simulation.vpi_definition_member.specialize (::talos::sim::SimVPIDefinitionMemberSpecializationOp)

Effective type and immutable value in a shared specialization

Syntax:

operation ::= `simulation.vpi_definition_member.specialize` $specialization `member` $member `type` $effective_type attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
specialization	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
effective_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
immutable_value	::talos::sim::FrozenConstantAttr	typed elaborated constant frozen into one simulation unit

simulation.vpi_definition_specialization.decl (::talos::sim::SimVPIDefinitionSpecializationDeclOp)

Shared elaborated specialization of a VPI definition

Syntax:

operation ::= `simulation.vpi_definition_specialization.decl` $sym_name `of` $definition attr-dict

Names one unique ordered set of effective member types and immutable values. Any number of elaborated scopes may reference the specialization.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_definition_type_default (::talos::sim::SimVPIDefinitionTypeDefaultOp)

Original builtin typespec source of a shared member

Syntax:

operation ::= `simulation.vpi_definition_type_default` $member `type` $original_type attr-dict

Stores an original type source independently of effective specialization types. The exact member must be a TypeParameter with has_original_default or a type-target ParamAssign with has_original_rhs. This bounded form admits anonymous builtin leaf types, without nominal or alias identity. A type parameter reference uses an exact Expr (default) or Rhs (assignment) relation instead.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
original_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection

simulation.vpi_enum_const.decl (::talos::sim::SimVPIEnumConstDeclOp)

Immutable VPI enum-constant inventory

Syntax:

operation ::= `simulation.vpi_enum_const.decl` $id `enum` $enum_typespec `ordinal` $ordinal
              `name` $name `value` $value attr-dict

Preserves one enum member in declaration order after semantic IR is erased. enum_typespec is an exact symbol relation to the owning enum typespec, so escaped names and identically named compilation-unit enums cannot collide. value retains the source four-state constant spelling; immutable_value retains its typed packed planes for value queries. Legacy declarations without a typed value retain metadata only. This declaration never participates in execution or scheduling.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
enum_typespec	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
name	::mlir::StringAttr	string attribute
value	::mlir::StringAttr	string attribute
immutable_value	::talos::sim::FrozenConstantAttr	typed elaborated constant frozen into one simulation unit

simulation.vpi_event_binding (::talos::sim::SimVPIEventBindingOp)

Exact runtime identity of an immutable named-event declaration

Syntax:

operation ::= `simulation.vpi_event_binding` $event `id` $event_id attr-dict

Associates a source named-event anchor with the event identity used by its executable waits and triggers. This is immutable reflection inventory and does not create an event or schedule work. Mutable event reference cells use their storage binding instead.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
event	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
event_id	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_expression.decl (::talos::sim::SimVPIExpressionDeclOp)

Exact typed occurrence in a source RTL expression

Syntax:

operation ::= `simulation.vpi_expression.decl` $sym_name `id` $id `type` $vpi_kind (`in` $scope_id^)? `owned_by` $owner
              `selector` $selector $mode `ordinal` $ordinal (`:` $type^)? attr-dict

Preserves one computed source occurrence independently of shared declaration leaves. owner, selector, mode, and ordinal identify its exact incoming relation slot. This structural ownership is separate from the public Parent relation of a selection. Value occurrences have an exact packed result type; integral Constants also have immutable planes. A source_only Operation explicitly retains syntax without an elaborated result type or value. Its physical and semantic type pair must be absent. Operation and indexed-select classifications are retained explicitly. These records neither allocate simulation storage nor execute or schedule the expression. Exactly one source context is retained: an instance scope, or a shared definition whose original Parameter default owns this occurrence. The latter never captures an arbitrary effective specialization.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object
selector	::mlir::IntegerAttr	32-bit signless integer attribute
mode	::talos::sim::VPIRelationModeAttr	VPI relation access mode
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
immutable_value	::talos::sim::FrozenConstantAttr	typed elaborated constant frozen into one simulation unit
op_type	::mlir::IntegerAttr	32-bit signless integer attribute
indexed_direction	::mlir::IntegerAttr	32-bit signless integer attribute
source_only	::mlir::UnitAttr	unit attribute
definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_foreach.decl (::talos::sim::SimVPIForeachDeclOp)

Exact fixed-array foreach collection and ordered index declarations

Syntax:

operation ::= `simulation.vpi_foreach.decl` $statement_id `collection` $collection `indices` $loop_variables attr-dict

Names an existing foreach statement and its whole fixed-array declaration. Each loop_variables entry is an exact local symbol or a unit attribute for a skipped dimension. Positions are source order, independent of the dense local declaration ordinals. Skips serialize as distinct unnamed NullOp occurrences; actual index variables retain their declaration identities.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute
collection	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object
loop_variables	::mlir::ArrayAttr	array attribute

simulation.vpi_initializer_binding (::talos::sim::SimVPIInitializerBindingOp)

Exact static source storage initialized by an internal helper

Syntax:

operation ::= `simulation.vpi_initializer_binding` $code_unit_id `storage` $storage_id attr-dict

Binds a nonprocedural initializer’s executable identity to existing static source storage. The helper introduces no procedural scope or frame. Calls retain their helper owner and derive their lexical scope from the source variable, including the canonical class property for static class storage.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
storage_id	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_interface_call.dispatch (::talos::sim::SimVPIInterfaceCallDispatchOp)

Source identity and visibility contract of an indirect interface call

Syntax:

operation ::= `simulation.vpi_interface_call.dispatch` $call `member` $member `access` $access attr-dict

Identifies the exact nominal member independently of its executable target set. Access is 0 for an unrestricted interface, 1 for a modport import, and 2 for a modport export. All elaborated instances of the exact nominal interface type participate, including instances under another top module (IEEE 1800-2023 25.9). Empty target sets remain explicit contracts. Implementations are derived only from declaration-owned interface membership and exports.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
call	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
member	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
access	::mlir::IntegerAttr	32-bit signless integer attribute

simulation.vpi_interface_instance.bind (::talos::sim::SimVPIInterfaceInstanceBindingOp)

Exact nominal type of an elaborated interface instance

Syntax:

operation ::= `simulation.vpi_interface_instance.bind` $scope_id `to` $interface_type attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
interface_type	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_interface_member.decl (::talos::sim::SimVPIInterfaceMemberDeclOp)

A callable member of one exact nominal interface type

Syntax:

operation ::= `simulation.vpi_interface_member.decl` $sym_name `of` $interface_type `name` $name
              $member_kind `signature` $signature `directions` $directions attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
interface_type	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
name	::mlir::StringAttr	string attribute
member_kind	::talos::sim::EntryKindAttr	simulation code-unit kind
signature	::mlir::TypeAttr	type attribute of function type
directions	::mlir::DenseI32ArrayAttr	i32 dense array attribute
is_extern	::mlir::UnitAttr	unit attribute

simulation.vpi_lexical_class_typespec.decl (::talos::sim::SimVPILexicalClassTypespecDeclOp)

Source class type construct without an effective specialization

Syntax:

operation ::= `simulation.vpi_lexical_class_typespec.decl` $sym_name `id` $id `in` $scope_id `owner` $owner `definition` $definition
              `debug` $debug_name attr-dict

Represents the lexical class type in an extends clause (IEEE 37.32 details 1-3). owner is the class in which the construct occurs; definition names the referenced lexical class declaration. The typespec has no executable class identity, semantic type root, member inventory, or specialization iteration membership. Omitted actuals are represented by default parameter assignments; unsupported explicit actuals retain their source syntax.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
definition	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
debug_name	::mlir::StringAttr	string attribute
unavailable_parameters	::mlir::StringAttr	string attribute

simulation.vpi_local.decl (::talos::sim::SimVPILocalDeclOp)

Immutable declaration of a frame automatic variable

Syntax:

operation ::= `simulation.vpi_local.decl` $sym_name `id` $id `in` $code_unit_id `scope`
              $scope_id (`within` $statement_scope_id^)? `ordinal` $ordinal
              `hierarchy` $hierarchical_name `debug` $debug_name `:` $value_type attr-dict

Preserves a local declaration independently of any runtime activation or storage allocation. Its owner is the exact lexical code unit; within names the nearest retained procedural scope statement when present. Without within, the owner must be a task or function scope. Declaration ordinals are dense within each exact scope. The stable ID belongs to the independent local-declaration namespace. This operation does not initialize or allocate storage; an executable binding supplies the current automatic reference after that reference exists.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
statement_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
ordinal	::mlir::IntegerAttr	32-bit signless integer attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
value_type	::mlir::TypeAttr	any type attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
source_ordinal	::mlir::IntegerAttr	32-bit signless integer attribute

simulation.vpi_net_identity.decl (::talos::sim::SimVPINetIdentityDeclOp)

Declared net identity sharing a collapsed physical net

Syntax:

operation ::= `simulation.vpi_net_identity.decl` $id `backed_by` $backing_net_id `in` $scope_id `:` $type
              `hierarchy` $hierarchical_name `debug` $debug_name attr-dict

Preserves a distinct source-declared net after executable topology has collapsed it onto backing_net_id. The reflection object retains its own name, scope, source type, optional user-defined nettype identity, and fixed properties while value access shares the backing net’s state offset. This metadata is immutable and never participates in scheduling or executable lowering.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
id	::mlir::IntegerAttr	64-bit signless integer attribute
backing_net_id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
type	::mlir::TypeAttr	any type attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
nettype	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_nettype.decl (::talos::sim::SimVPINettypeDeclOp)

Immutable user-defined nettype inventory

Syntax:

operation ::= `simulation.vpi_nettype.decl` $sym_name `id` $id `in` $scope_id `owner` $owner
              `hierarchy` $hierarchical_name `debug` $debug_name attr-dict

Preserves one source nettype declaration after semantic IR is erased. owner is its exact lexical VPI anchor, target_type is the declared data type, direct_alias retains only the immediately named nettype declaration, and resolution_function names the effective resolver’s function anchor. The declaration is cold reflection inventory and never participates in scheduling or executable lowering.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
target_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
direct_alias	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
resolution_function	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

simulation.vpi_object.anchor (::talos::sim::SimVPIObjectAnchorOp)

Canonical source identity for a persistent VPI object

Syntax:

operation ::= `simulation.vpi_object.anchor` $sym_name `id` $inventory_id `type` $vpi_kind
              `in` $enclosing_scope_id (`parent` $parent^)?
              `ordinal` $owner_ordinal `hierarchy` $hierarchical_name
              `debug` $debug_name attr-dict

Separates source-language identity from executable descriptor identity. parent names another anchor or a canonical class-specialization typespec and preserves exact lexical ownership even when the display hierarchy is ambiguous, as it is for multiple compilation units. A backing maps the anchor onto an existing scope, class, or code-unit record; otherwise the serializer materializes a static-only reflection object. Anchors never participate in scheduling or executable lowering. Relation-backed arrays carry either declared index_ranges or exact sparse_indices; each child carries its coordinates within the immediate parent. Optional index_dimension_flags contains one 0/1 unpacked/packed flag per range. primitive_input_count preserves the IEEE 37.33 vpiSize value for scalar primitive anchors. vpi_type and immutable_value preserve the exact source type and elaborated value of static-only objects such as parameters. Effective type parameters retain only vpi_type; their resolved data type is not a value and does not allocate immutable value storage. A lexical generic type parameter instead carries unresolved_type_parameter and no effective payload; its exact ClassDefn owner supplies source identity. A lexical generic value parameter carries unresolved_value_parameter and likewise has no effective type or value. Constant and Operation anchors retain unnamed original-default expression occurrences, with exact parameter/operator ownership and explicit generated expression relations. unavailable_default retains the original source text for a present default whose structure is unsupported. It is exclusive with an explicit Expr relation; absence of both denotes no source default. has_explicit_parameter_range records whether a value parameter directly declared a packed range, rather than inheriting one from a built-in or typedef type. These attributes remain reflection metadata and never allocate simulation state.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
inventory_id	::mlir::IntegerAttr	64-bit signless integer attribute
vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
enclosing_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
parent	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
owner_ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
is_compilation_unit	::mlir::UnitAttr	unit attribute
backing	::talos::sim::VPIObjectBackingAttr	physical executable descriptor backing a source VPI object
index_ranges	::mlir::DenseI64ArrayAttr	i64 dense array attribute
index_dimension_flags	::mlir::DenseI64ArrayAttr	i64 dense array attribute
sparse_indices	::mlir::DenseI64ArrayAttr	i64 dense array attribute
member_indices	::mlir::DenseI64ArrayAttr	i64 dense array attribute
primitive_input_count	::mlir::IntegerAttr	64-bit signless integer attribute
vpi_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
immutable_value	::talos::sim::FrozenConstantAttr	typed elaborated constant frozen into one simulation unit
has_explicit_parameter_range	::mlir::UnitAttr	unit attribute
class_method	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
unresolved_type_parameter	::mlir::UnitAttr	unit attribute
unavailable_default	::mlir::StringAttr	string attribute
unresolved_value_parameter	::mlir::UnitAttr	unit attribute

simulation.vpi_relation.decl (::talos::sim::SimVPIRelationDeclOp)

Immutable general VPI object relation

Syntax:

operation ::= `simulation.vpi_relation.decl` $source `selector` $selector $mode `ordinal` $ordinal `to` $target attr-dict

Records one non-containment VPI graph edge between stable logical object identities. Exact endpoint VPI kinds and traversal legality are derived from the referenced declarations and the generated IEEE object model. Each declaration represents one access mode so singular handle edges and dense iterator ordering remain explicit. This metadata never participates in scheduling or executable lowering.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
source	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object
selector	::mlir::IntegerAttr	32-bit signless integer attribute
mode	::talos::sim::VPIRelationModeAttr	VPI relation access mode
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
target	::talos::sim::VPIObjectRefAttr	stable logical reference to a VPI-visible design object

simulation.vpi_statement_relation.decl (::talos::sim::SimVPIStatementRelationDeclOp)

Immutable VPI statement-containment relation

Syntax:

operation ::= `simulation.vpi_statement_relation.decl` $source_kind $source_id `type` $source_vpi_kind
              `selector` $selector `ordinal` $ordinal `modes` $mode_mask
              `to` $target_statement_id attr-dict

Records one semantic incoming containment edge for a statement. The source is a stable tagged scope, code-unit, statement, or VPI-anchor inventory ID. Anchor sources retain lexical scopes, such as generate scopes, which do not have an executable scope.decl. mode_mask uses bit zero for vpi_handle and bit one for vpi_iterate; when both access modes expose the same semantic child they are merged into one record. ordinal is dense independently for each source, selector, and access mode.

This is static reflection inventory. It does not register callbacks or add work to the scheduler.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
source_kind	::talos::sim::VPIStatementSourceKindAttr	VPI statement-relation source kind
source_id	::mlir::IntegerAttr	64-bit signless integer attribute
source_vpi_kind	::mlir::IntegerAttr	32-bit signless integer attribute
selector	::mlir::IntegerAttr	32-bit signless integer attribute
ordinal	::mlir::IntegerAttr	64-bit signless integer attribute
mode_mask	::mlir::IntegerAttr	32-bit signless integer attribute
target_statement_id	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_static_local.bind (::talos::sim::SimVPIStaticLocalBindingOp)

Exact procedural scope of existing static variable storage

Syntax:

operation ::= `simulation.vpi_static_local.bind` $storage_id `in` $code_unit_id (`within` $statement_scope_id^)? `ordinal` $ordinal attr-dict

Refines an existing static storage declaration’s source owner without introducing another variable identity. The owner is a task/function or the nearest retained scope statement of the exact lexical code unit. The ordinal is source declaration order across automatic and static declarations; automatic declarations retain their separate dense frame inventory ordinal and carry source_ordinal when the orders differ. Delegated class and named-event identities use their own owner bindings.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
storage_id	::mlir::IntegerAttr	64-bit signless integer attribute
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
statement_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
ordinal	::mlir::IntegerAttr	32-bit signless integer attribute

simulation.vpi_terminal_driver.bind (::talos::sim::SimVPITerminalDriverBindingOp)

Exact published driver state of a scalar primitive output

Syntax:

operation ::= `simulation.vpi_terminal_driver.bind` $terminal `low` $low_driver_id (`high` $high_driver_id^)? `bit` $bit_offset attr-dict

Retains an output occurrence’s own delayed driver state independently of the resolved connected net. The optional high driver must be the exact complementary polarity bank of the low driver. This inventory creates no state, and both selectors use the same bit offset within their descriptors.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
terminal	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
low_driver_id	::mlir::IntegerAttr	64-bit signless integer attribute
high_driver_id	::mlir::IntegerAttr	64-bit signless integer attribute
bit_offset	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_thread_origin_binding (::talos::sim::SimVPIThreadOriginBindingOp)

Exact source statement of a runtime thread activation

Syntax:

operation ::= `simulation.vpi_thread_origin_binding` $code_unit_id `origin` $statement_id attr-dict

Associates an executable code-unit identity with the source statement that created that thread. This is immutable reflection inventory, independent of statement containment. An outlined internal fork branch can therefore name its original statement without moving that statement from its lexical owner.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
code_unit_id	::mlir::IntegerAttr	64-bit signless integer attribute
statement_id	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_typespec.decl (::talos::sim::SimVPITypespecDeclOp)

Immutable named VPI typespec inventory

Syntax:

operation ::= `simulation.vpi_typespec.decl` $sym_name `id` $id `in` $scope_id (`owner` $owner^)?
              (`within` $statement_scope_id^)?
              `hierarchy` $hierarchical_name
              `debug` $debug_name attr-dict

Preserves a source typespec as a resolvable symbol after semantic IR is erased. For typedefs and anonymous enums, owner is the exact source VPI anchor, or statement_scope_id names the exact procedural statement scope. Exactly one owner is present. Unlike scope_id, neither collapses lexical package, compilation-unit, class, subroutine, property, or sequence scopes. An interface typespec uses its enclosing persistent anchor as an image namespace because IEEE 1800 exposes it through vpiTypespec, not an owner traversal. A builtin class typespec represents the alias-free process, semaphore, or mailbox specialization and is owned by the source standard package; it has no class definition or executable class descriptor. A canonical mailbox specialization can preserve its normalized element storage type in message_type. It supplies exact immutable layout for VPI message snapshots and does not change the mailbox’s own handle storage. target_type retains the complete canonical source shape, optional interface/modport identity, and ordered typedef-alias layers. The declaration is reflection inventory only and never participates in executable type conversion or scheduling.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute
target_type	::talos::sim::VPITypeSemanticsAttr	source-semantic type retained for VPI reflection
origin	::talos::sim::VPITypespecOriginAttr	VPI typespec inventory origin
source_type_identity	::mlir::IntegerAttr	64-bit signless integer attribute
message_type	::mlir::TypeAttr	any type attribute
statement_scope_id	::mlir::IntegerAttr	64-bit signless integer attribute

simulation.vpi_unresolved_type_alias.decl (::talos::sim::SimVPIUnresolvedTypeAliasDeclOp)

Lexical typedef of an unresolved class type parameter

Syntax:

operation ::= `simulation.vpi_unresolved_type_alias.decl` $sym_name `id` $id `in` $scope_id `owner` $owner `alias` $target
              `hierarchy` $hierarchical_name `debug` $debug_name attr-dict

Preserves a distinct named typespec identity when its underlying type parameter has no effective type (IEEE 1800-2023 37.25 details 6 and 11). The exact target is an unresolved type parameter in the same lexical class, or a preceding alias of such a parameter. The object has public kind TypeParameter, but is a typedef, not a parameter declaration: it has no effective semantic root, value, default expression, or Parameter inventory membership. Concrete typedefs continue to use vpi_typespec.decl.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:

Attribute	MLIR Type	Description
sym_name	::mlir::StringAttr	string attribute
id	::mlir::IntegerAttr	64-bit signless integer attribute
scope_id	::mlir::IntegerAttr	64-bit signless integer attribute
owner	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
target	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
hierarchical_name	::mlir::StringAttr	string attribute
debug_name	::mlir::StringAttr	string attribute

simulation.wait_order.failed (::talos::sim::SimWaitOrderFailedOp)

Read the outcome of the ordered event wait just resumed

Syntax:

operation ::= `simulation.wait_order.failed` attr-dict

Returns true when the immediately preceding suspend.event_order completed because an untriggered later event occurred out of order. The scheduler retains this per-logical-process result while executing the resumed continuation.

Interfaces: InferTypeOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource}

Results:

Result	Description
result	1-bit signless integer

simulation.weak.clear (::talos::sim::SimWeakClearOp)

Clear a weak_reference referent

Syntax:

operation ::= `simulation.weak.clear` $weak attr-dict `:` qualified(type($weak))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
weak	nullable statically typed managed class handle

simulation.weak.create (::talos::sim::SimWeakCreateOp)

Create a managed weak_reference wrapper

Syntax:

operation ::= `simulation.weak.create` $context `,` $referent attr-dict `:`
              type($context) `,` qualified(type($referent))
              `->` qualified(type($result))

Traits: SimAllocatesManagedStorage

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource}

Operands:

Operand	Description
context	opaque simulator and design context
referent	nullable statically typed managed class handle

Results:

Result	Description
result	nullable statically typed managed class handle

simulation.weak.get (::talos::sim::SimWeakGetOp)

Promote a reachable weak referent to a strong handle

Syntax:

operation ::= `simulation.weak.get` $weak attr-dict `:` qualified(type($weak))
              `->` qualified(type($result))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::HeapResource}

Operands:

Operand	Description
weak	nullable statically typed managed class handle

Results:

Result	Description
result	nullable statically typed managed class handle

Attributes

ArgumentBindingAttr

Source name bound to one prepared unit argument

Syntax:

#simulation.argument_binding<
  ::mlir::StringAttr,   # path
  uint64_t,   # argument
  ::talos::sim::UnitArgumentKind,   # kind
  bool,   # copyOut
  ::mlir::IntegerAttr,   # lvalueNode
  bool,   # copyIn
  ::mlir::FlatSymbolRefAttr   # vpiLocal
>

Parameters:

Parameter	C++ type	Description
path	::mlir::StringAttr
argument	uint64_t
kind	::talos::sim::UnitArgumentKind	an enum of type UnitArgumentKind
copyOut	bool
lvalueNode	::mlir::IntegerAttr
copyIn	bool
vpiLocal	::mlir::FlatSymbolRefAttr

AssertionControlActionAttr

Simulation assertion control action

Syntax:

#simulation.assertion_control_action<
  ::talos::sim::AssertionControlAction   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::AssertionControlAction	an enum of type AssertionControlAction

AssocKeyKindAttr

Simulation assoc key kind

Syntax:

#simulation.assoc_key_kind<
  ::talos::sim::AssocKeyKind   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::AssocKeyKind	an enum of type AssocKeyKind

AssocTraversalDirectionAttr

Simulation assoc traversal direction

Syntax:

#simulation.assoc_traversal_direction<
  ::talos::sim::AssocTraversalDirection   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::AssocTraversalDirection	an enum of type AssocTraversalDirection

BlockEventKindAttr

Simulation block event kind

Syntax:

#simulation.block_event_kind<
  ::talos::sim::BlockEventKind   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::BlockEventKind	an enum of type BlockEventKind

BooleanMinimizationAttr

Boolean minimization of one concurrent property operand

Syntax:

#simulation.boolean_minimization<
  ::talos::sim::BooleanMinimizationScope,   # scope
  ::llvm::StringRef,   # solver
  uint64_t,   # queries
  uint64_t,   # alternativesBefore
  uint64_t,   # alternativesAfter
  uint64_t,   # literalsBefore
  uint64_t   # literalsAfter
>

Compile-time statistics of one minimization of the boolean sequence alternatives of a concurrent property’s scope operand: the solver backend, the number of queries it answered, and the alternative and literal counts before and after minimization.

Parameters:

Parameter	C++ type	Description
scope	::talos::sim::BooleanMinimizationScope	an enum of type BooleanMinimizationScope
solver	::llvm::StringRef
queries	uint64_t
alternativesBefore	uint64_t
alternativesAfter	uint64_t
literalsBefore	uint64_t
literalsAfter	uint64_t

CalleeFormalAttr

One formal argument of a call’s frozen callee signature

Syntax:

#simulation.callee_formal<
  ::talos::sim::FormalDirection,   # direction
  ::mlir::Type,   # type
  bool,   # isSigned
  bool,   # argumentRef
  bool,   # isStatic
  ::mlir::Type   # semanticType
>

The formal’s direction, normalized type and signedness. argumentRef marks a ref formal of a task whose actuals are passed as argument references; isStatic a formal of a static subroutine, which lives in design storage. Formals of DPI imports keep their source semanticType for the C ABI.

Parameters:

Parameter	C++ type	Description
direction	::talos::sim::FormalDirection	an enum of type FormalDirection
type	::mlir::Type
isSigned	bool
argumentRef	bool
isStatic	bool
semanticType	::mlir::Type

ConstantBindingAttr

Source name bound to a typed elaborated constant

Syntax:

#simulation.constant_binding<
  ::mlir::StringAttr,   # path
  ::talos::sim::FrozenConstantAttr   # value
>

Parameters:

Parameter	C++ type	Description
path	::mlir::StringAttr
value	::talos::sim::FrozenConstantAttr	typed elaborated constant frozen into one simulation unit

ContainerKindAttr

Simulation container kind

Syntax:

#simulation.container_kind<
  ::talos::sim::ContainerKind   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::ContainerKind	an enum of type ContainerKind

CoveragePointKindAttr

Simulation coverage point kind

Syntax:

#simulation.coverage_point_kind<
  ::talos::sim::CoveragePointKind   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::CoveragePointKind	an enum of type CoveragePointKind

DescriptorBindingAttr

Source name bound directly through the simulation context

Syntax:

#simulation.descriptor_binding<
  ::mlir::StringAttr,   # path
  uint64_t,   # descriptor
  ::mlir::Type   # type
>

Parameters:

Parameter	C++ type	Description
path	::mlir::StringAttr
descriptor	uint64_t
type	::mlir::Type

ElementFlagsAttr

Simulation element flags

Syntax:

#simulation.element_flags<
  ::talos::sim::ElementFlags   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::ElementFlags	an enum of type ElementFlags

ElementKindAttr

Simulation element kind

Syntax:

#simulation.element_kind<
  ::talos::sim::ElementKind   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::ElementKind	an enum of type ElementKind

EnumFormatAttr

Enumerator values and names of one source enum type

Syntax:

#simulation.enum_format<
  ::mlir::Type,   # type
  ::mlir::ArrayAttr,   # values
  ::mlir::ArrayAttr   # names
>

The values (#simulation.frozen_constant) and names of the enumerators of the source enum type type, in declaration order. An assignment pattern prints an enum element by its name (IEEE 1800-2023 21.2.1.6).

Parameters:

Parameter	C++ type	Description
type	::mlir::Type
values	::mlir::ArrayAttr
names	::mlir::ArrayAttr

FieldAttr

Ordered aggregate field metadata

Syntax:

#simulation.field<
  ::mlir::StringAttr,   # name
  ::mlir::Type,   # type
  uint32_t,   # ordinal
  uint64_t,   # packedOffset
  ::mlir::Attribute   # initializer
>

initializer is the constant default member value an unpacked struct field declares (IEEE 1800-2023 7.2.2), as a #simulation.frozen_constant of the field type. It is part of the struct type’s default value, so every default of the type – a variable without an initializer, a new array element, or a read of a nonexistent entry (Table 7-1) – carries it.

Parameters:

Parameter	C++ type	Description
name	::mlir::StringAttr
type	::mlir::Type
ordinal	uint32_t
packedOffset	uint64_t
initializer	::mlir::Attribute

FrozenConstantAttr

Typed elaborated constant frozen into one simulation unit

Syntax:

#simulation.frozen_constant<
  ::mlir::Type,   # type
  ::mlir::Attribute,   # value
  bool   # isSigned
>

Carries the exact value of a parameter, localparam, enum value, specparam, or elaborated genvar after whole-design elaboration has completed. Packed values use the same two-plane [value, unknown] representation as simulation.logic.constant; real values use an f64 FloatAttr. Fixed unpacked arrays use an ArrayAttr of recursively typed frozen constants. The declared normalized type is retained so aggregate shape is not lost.

Parameters:

Parameter	C++ type	Description
type	::mlir::Type
value	::mlir::Attribute
isSigned	bool

IntegerExpressionAttr

Symbolic integer function of a call’s arguments

Syntax:

#simulation.integer_expression<
  ::talos::sim::IntegerExpressionKind,   # kind
  uint32_t,   # width
  ::mlir::IntegerAttr,   # value
  std::optional<uint32_t>,   # index
  ::mlir::ArrayAttr   # operands
>

A constant holds its value; an argument names the call operand index; every other kind applies to its operands. All nodes have a nonzero width of at most 128 bits.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::IntegerExpressionKind	an enum of type IntegerExpressionKind
width	uint32_t
value	::mlir::IntegerAttr
index	std::optional<uint32_t>
operands	::mlir::ArrayAttr

IntegerRangeAttr

Unsigned and signed bounds an integer value never leaves

Syntax:

#simulation.integer_range<
  ::mlir::IntegerAttr,   # umin
  ::mlir::IntegerAttr,   # umax
  ::mlir::IntegerAttr,   # smin
  ::mlir::IntegerAttr   # smax
>

Parameters:

Parameter	C++ type	Description
umin	::mlir::IntegerAttr
umax	::mlir::IntegerAttr
smin	::mlir::IntegerAttr
smax	::mlir::IntegerAttr

InterconnectLeafAttr

One typed leaf of a typeless interconnect array

Syntax:

#simulation.interconnect_leaf<
  ::mlir::StringAttr,   # path
  ::mlir::DenseI64ArrayAttr,   # indices
  ::mlir::Type,   # type
  ::talos::sim::VPITypeSemanticsAttr,   # vpiType
  ::mlir::SymbolRefAttr,   # nettype
  ::mlir::IntegerAttr   # typeIdentity
>

The leaf at element indices of a fixed unpacked interconnect array acquires the data type, VPI type vpiType and nettype of the nets it connects (IEEE 1800-2023 6.6.8); its descriptor has hierarchical path. typeIdentity is the frontend identity of an anonymous enum type.

Parameters:

Parameter	C++ type	Description
path	::mlir::StringAttr
indices	::mlir::DenseI64ArrayAttr
type	::mlir::Type
vpiType	::talos::sim::VPITypeSemanticsAttr
nettype	::mlir::SymbolRefAttr
typeIdentity	::mlir::IntegerAttr

LocalBindingAttr

Source name bound to activation-local storage

Syntax:

#simulation.local_binding<
  ::mlir::StringAttr,   # path
  ::mlir::Type,   # type
  bool,   # automatic
  bool,   # patternVariable
  bool,   # isReturn
  ::mlir::FlatSymbolRefAttr   # vpiLocal
>

Parameters:

Parameter	C++ type	Description
path	::mlir::StringAttr
type	::mlir::Type
automatic	bool
patternVariable	bool
isReturn	bool
vpiLocal	::mlir::FlatSymbolRefAttr

MemberVisibilityAttr

Class member visibility

Syntax:

#simulation.member_visibility<
  ::talos::sim::MemberVisibility   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::MemberVisibility	an enum of type MemberVisibility

RadixAttr

Simulation radix

Syntax:

#simulation.radix<
  ::talos::sim::Radix   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::Radix	an enum of type Radix

RandModeDispatchAttr

Class-specific static state of an object rand_mode() call

Syntax:

#simulation.rand_mode_dispatch<
  ::mlir::FlatSymbolRefAttr,   # target
  ::mlir::DenseI64ArrayAttr,   # storages
  ::mlir::ArrayAttr   # elements
>

When the receiver is an instance of target, obj.rand_mode() also sets the shared rand_mode() words in static storages and resets the element modes elements of that class.

Parameters:

Parameter	C++ type	Description
target	::mlir::FlatSymbolRefAttr
storages	::mlir::DenseI64ArrayAttr
elements	::mlir::ArrayAttr

RandomAliasGuardAttr

A recursive random-object path that may alias an ancestor

Syntax:

#simulation.random_alias_guard<
  ::talos::sim::RandomNestedObjectAttr,   # object
  uint32_t   # aliasDepth
>

Randomization fails at run time when the object at the end of object’s path is the object aliasDepth steps along it.

Parameters:

Parameter	C++ type	Description
object	::talos::sim::RandomNestedObjectAttr
aliasDepth	uint32_t

RandomConstraintBlockReferenceAttr

Symbolic constraint_mode state consumed by a template

Syntax:

#simulation.random_constraint_block_reference<
  ::talos::sim::RandomConstraintBlockReferenceKind,   # kind
  ::mlir::IntegerAttr,   # index
  ::mlir::IntegerAttr   # storage
>

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::RandomConstraintBlockReferenceKind	an enum of type RandomConstraintBlockReferenceKind
index	::mlir::IntegerAttr
storage	::mlir::IntegerAttr

RandomContainerAttr

A random dynamic array, queue, or associative array

Syntax:

#simulation.random_container<
  ::mlir::FlatSymbolRefAttr,   # field
  ::mlir::Type,   # type
  ::mlir::Type,   # elementType
  uint32_t,   # elementWidth
  uint32_t,   # modeIndex
  bool,   # inertClassHandles
  ::talos::sim::RandomNestedObjectAttr   # nested
>

The receiver’s class field of container type type, whose elements of elementType are randomized as elementWidth-bit values; with inertClassHandles, its class-handle elements are not randomized. nested places the field in a nested random object.

Parameters:

Parameter	C++ type	Description
field	::mlir::FlatSymbolRefAttr
type	::mlir::Type
elementType	::mlir::Type
elementWidth	uint32_t
modeIndex	uint32_t
inertClassHandles	bool
nested	::talos::sim::RandomNestedObjectAttr

RandomContainerElementsAttr

The leading elements of a random dynamic container

Syntax:

#simulation.random_container_elements<
  ::mlir::Type,   # type
  uint32_t   # sizeProperty
>

The property is a fixed unpacked array holding the leading elements of a container of type type, whose size is the property at index sizeProperty. Elements at or beyond the solved size are not stored.

Parameters:

Parameter	C++ type	Description
type	::mlir::Type
sizeProperty	uint32_t

RandomContainerSizeAttr

A random dynamic container whose size is randomized

Syntax:

#simulation.random_container_size<
  ::mlir::Type,   # type
  uint64_t,   # sizeConstraintMask
  bool   # unconditional
>

The property is the size of a container of type type. sizeConstraintMask selects the constraint blocks that constrain the size; unconditional is set when one of them always applies.

Parameters:

Parameter	C++ type	Description
type	::mlir::Type
sizeConstraintMask	uint64_t
unconditional	bool

RandomCycleStateAttr

The permutation state of a randc variable

Syntax:

#simulation.random_cycle_state<
  ::mlir::Attribute,   # key
  ::mlir::Attribute,   # position
  ::mlir::Attribute   # domain
>

The permutation key, the position in the current cycle, and the cycle domain of a randc variable (IEEE 1800-2023 18.4.2). Instance state names three class fields; static state names three storage paths.

Parameters:

Parameter	C++ type	Description
key	::mlir::Attribute
position	::mlir::Attribute
domain	::mlir::Attribute

RandomDistributionAttr

Simulation random distribution

Syntax:

#simulation.random_distribution<
  ::talos::sim::RandomDistribution   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::RandomDistribution	an enum of type RandomDistribution

RandomDomainAttr

The finite value domain of a bit range of a random property

Syntax:

#simulation.random_domain<
  uint64_t,   # offset
  uint64_t,   # width
  ::mlir::ArrayAttr   # patterns
>

Bits offset to offset + width - 1 of the property take only values matched by one of the disjoint #simulation.random_patterns of patterns (an enum type’s values, IEEE 1800-2023 18.4).

Parameters:

Parameter	C++ type	Description
offset	uint64_t
width	uint64_t
patterns	::mlir::ArrayAttr

RandomElementModesAttr

Per-element rand_mode() bits of a fixed random array

Syntax:

#simulation.random_element_modes<
  uint32_t,   # width
  ::mlir::FlatSymbolRefAttr,   # field
  std::optional<uint64_t>   # storage
>

A width-bit element mode bitmap that rand_mode() resets with its variable: the receiver’s class field, or static design storage.

Parameters:

Parameter	C++ type	Description
width	uint32_t
field	::mlir::FlatSymbolRefAttr
storage	std::optional<uint64_t>

RandomMemberStorageAttr

A random member of an unpacked structure property

Syntax:

#simulation.random_member_storage<
  ::mlir::DenseI64ArrayAttr,   # path
  ::mlir::Type,   # type
  uint64_t,   # parentModeMask
  uint64_t   # staticModeMask
>

The member at the element ordinals path of the property’s storage of type type. The member is enabled when every rand_mode() bit of parentModeMask is enabled and, for static properties, the bits of staticModeMask.

Parameters:

Parameter	C++ type	Description
path	::mlir::DenseI64ArrayAttr
type	::mlir::Type
parentModeMask	uint64_t
staticModeMask	uint64_t

RandomNestedConstraintsAttr

Constraint blocks contributed by a nested random object

Syntax:

#simulation.random_nested_constraints<
  ::talos::sim::RandomNestedObjectAttr,   # object
  ::mlir::DenseI64ArrayAttr   # globalIndices
>

globalIndices are the positions of the nested object’s constraint blocks in the randomize() call’s constraint set.

Parameters:

Parameter	C++ type	Description
object	::talos::sim::RandomNestedObjectAttr
globalIndices	::mlir::DenseI64ArrayAttr

RandomNestedHooksAttr

Randomization hooks of a nested random object

Syntax:

#simulation.random_nested_hooks<
  ::talos::sim::RandomNestedObjectAttr,   # object
  ::talos::sim::RandomizeHookAttr,   # pre
  ::talos::sim::RandomizeHookAttr   # post
>

Parameters:

Parameter	C++ type	Description
object	::talos::sim::RandomNestedObjectAttr
pre	::talos::sim::RandomizeHookAttr
post	::talos::sim::RandomizeHookAttr

RandomNestedObjectAttr

A random object reached through rand class-handle fields

Syntax:

#simulation.random_nested_object<
  ::mlir::FlatSymbolRefAttr,   # field
  ::talos::sim::ClassHandleType,   # concrete
  ::talos::sim::ClassHandleType,   # storage
  uint32_t,   # outerModeIndex
  ::mlir::ArrayAttr   # path
>

The receiver’s field, with class-handle type storage and constant concrete class, followed by the #simulation.random_object_steps of path. outerModeIndex is the receiver’s rand_mode() index of field.

Parameters:

Parameter	C++ type	Description
field	::mlir::FlatSymbolRefAttr
concrete	::talos::sim::ClassHandleType
storage	::talos::sim::ClassHandleType
outerModeIndex	uint32_t
path	::mlir::ArrayAttr

RandomNestedSelectionAttr

The dynamic class a nested randomize() alternative handles

Syntax:

#simulation.random_nested_selection<
  ::mlir::FlatSymbolRefAttr,   # field
  ::mlir::ArrayAttr,   # path
  ::mlir::FlatSymbolRefAttr   # target
>

Selects the alternative of a nested randomize() dispatch whose target, reached through field or the field symbols of path, is an instance of class target; without target the alternative handles a null object.

Parameters:

Parameter	C++ type	Description
field	::mlir::FlatSymbolRefAttr
path	::mlir::ArrayAttr
target	::mlir::FlatSymbolRefAttr

RandomObjectStepAttr

One class-handle field on a path to a nested random object

Syntax:

#simulation.random_object_step<
  ::mlir::FlatSymbolRefAttr,   # field
  ::talos::sim::ClassHandleType,   # storage
  ::talos::sim::ClassHandleType,   # concrete
  std::optional<uint32_t>   # modeIndex
>

Loads field, declared with class-handle type storage, from the previous object on the path. An intermediate step casts the loaded handle to its concrete class; a step that controls rand_mode() also names the field’s effective modeIndex in its owner.

Parameters:

Parameter	C++ type	Description
field	::mlir::FlatSymbolRefAttr
storage	::talos::sim::ClassHandleType
concrete	::talos::sim::ClassHandleType
modeIndex	std::optional<uint32_t>

RandomPatternAttr

A ternary pattern of a finite random domain

Syntax:

#simulation.random_pattern<
  ::mlir::IntegerAttr,   # mask
  ::mlir::IntegerAttr   # value
>

Matches the values whose bits under mask equal value; the other bits are free.

Parameters:

Parameter	C++ type	Description
mask	::mlir::IntegerAttr
value	::mlir::IntegerAttr

RandomPropertyAttr

One random variable of a randomize() call

Syntax:

#simulation.random_property<
  ::mlir::FlatSymbolRefAttr,   # field
  ::mlir::StringAttr,   # path
  ::mlir::SymbolRefAttr,   # symbol
  ::mlir::Type,   # type
  uint64_t,   # width
  uint32_t,   # modeIndex
  bool,   # isSigned
  bool,   # isRandC
  std::optional<uint64_t>,   # modeStorage
  ::talos::sim::RandomContainerSizeAttr,   # containerSize
  ::talos::sim::RandomNestedObjectAttr,   # nested
  ::talos::sim::RandomMemberStorageAttr,   # member
  ::mlir::FlatSymbolRefAttr,   # elementModeField
  std::optional<uint64_t>,   # elementModeStorage
  std::optional<uint32_t>,   # elementWidth
  ::talos::sim::RandomCycleStateAttr,   # cycle
  ::mlir::ArrayAttr,   # domains
  ::talos::sim::RandomContainerElementsAttr   # containerElements
>

A packed random variable of type type and width bits: the receiver’s class field, or the unit-local storage path (named by symbol for a scope randomize()). modeIndex is its rand_mode() index; static properties keep their rand_mode() bit in storage modeStorage.

The variable may be the size of a random dynamic container (containerSize) or its leading elements (containerElements), a property of a nested random object (nested, whose field names the property within that object), or a member of an unpacked structure (member). Fixed arrays carry per-element rand_mode() bits in elementModeField or elementModeStorage, elementWidth bits per element. randc variables keep their cycle state, and enum values restrict the variable to domains.

Parameters:

Parameter	C++ type	Description
field	::mlir::FlatSymbolRefAttr
path	::mlir::StringAttr
symbol	::mlir::SymbolRefAttr
type	::mlir::Type
width	uint64_t
modeIndex	uint32_t
isSigned	bool
isRandC	bool
modeStorage	std::optional<uint64_t>
containerSize	::talos::sim::RandomContainerSizeAttr
nested	::talos::sim::RandomNestedObjectAttr
member	::talos::sim::RandomMemberStorageAttr
elementModeField	::mlir::FlatSymbolRefAttr
elementModeStorage	std::optional<uint64_t>
elementWidth	std::optional<uint32_t>
cycle	::talos::sim::RandomCycleStateAttr
domains	::mlir::ArrayAttr
containerElements	::talos::sim::RandomContainerElementsAttr

RandomStructMemberAttr

A rand or randc member of an unpacked structure property

Syntax:

#simulation.random_struct_member<
  ::mlir::DenseI64ArrayAttr,   # path
  ::mlir::Type,   # semanticType
  ::mlir::Type,   # type
  bool,   # isRandC
  uint32_t,   # modeIndex
  ::talos::sim::RandomCycleStateAttr,   # cycle
  ::mlir::FlatSymbolRefAttr,   # elementModeField
  std::optional<uint64_t>   # elementModeStorage
>

The member at the element ordinals path, of source type semanticType and executable type type, with rand_mode() index modeIndex. A randc member keeps its cycle state; a fixed-array member keeps per-element rand_mode() bits in elementModeField or elementModeStorage.

Parameters:

Parameter	C++ type	Description
path	::mlir::DenseI64ArrayAttr
semanticType	::mlir::Type
type	::mlir::Type
isRandC	bool
modeIndex	uint32_t
cycle	::talos::sim::RandomCycleStateAttr
elementModeField	::mlir::FlatSymbolRefAttr
elementModeStorage	std::optional<uint64_t>

RandomValueReferenceAttr

Symbolic packed value consumed by a constraint template

Syntax:

#simulation.random_value_reference<
  ::talos::sim::RandomValueReferenceKind,   # kind
  ::llvm::ArrayRef<::mlir::FlatSymbolRefAttr>,   # path
  ::mlir::FlatSymbolRefAttr,   # target
  ::mlir::IntegerAttr,   # storage
  uint64_t,   # low
  uint64_t   # width
>

Identifies a packed bit slice without embedding a target layout offset. object_field starts at the object owning the template, follows the optional strong class-handle path, and names a terminal instance field. storage names an immutable design-storage descriptor ID. Runtime graph composition classifies an object field as an active random variable or as current state according to the invocation’s active-object set and rand_mode state.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::RandomValueReferenceKind	an enum of type RandomValueReferenceKind
path	::llvm::ArrayRef<::mlir::FlatSymbolRefAttr>
target	::mlir::FlatSymbolRefAttr
storage	::mlir::IntegerAttr
low	uint64_t
width	uint64_t

RandomVariableReferenceAttr

Object-relative symbolic random-variable reference

Syntax:

#simulation.random_variable_reference<
  ::llvm::ArrayRef<::mlir::FlatSymbolRefAttr>,   # path
  ::mlir::FlatSymbolRefAttr   # target
>

Identifies one packed rand or randc field relative to the object owning a randomization constraint template. path follows strong rand class-handle fields in source order; target names the terminal packed random field. The owning class operation verifies the complete static type chain.

Parameters:

Parameter	C++ type	Description
path	::llvm::ArrayRef<::mlir::FlatSymbolRefAttr>
target	::mlir::FlatSymbolRefAttr

RandomizeHookAttr

A pre_randomize() or post_randomize() call

Syntax:

#simulation.randomize_hook<
  ::mlir::FlatSymbolRefAttr,   # callee
  ::mlir::FlatSymbolRefAttr,   # owner
  ::mlir::FlatSymbolRefAttr,   # source
  ::mlir::ArrayAttr,   # captures
  ::mlir::ArrayAttr   # reads
>

Calls method callee of class owner, lowered from semantic subroutine source. Once captures are frozen, captures lists the unit-local paths passed as arguments and reads the paths the hook reads.

Parameters:

Parameter	C++ type	Description
callee	::mlir::FlatSymbolRefAttr
owner	::mlir::FlatSymbolRefAttr
source	::mlir::FlatSymbolRefAttr
captures	::mlir::ArrayAttr
reads	::mlir::ArrayAttr

StochasticQueueActionAttr

Simulation stochastic queue action

Syntax:

#simulation.stochastic_queue_action<
  ::talos::sim::StochasticQueueAction   # value
>

Parameters:

Parameter	C++ type	Description
value	::talos::sim::StochasticQueueAction	an enum of type StochasticQueueAction

StorageLayoutAttr

LLVM DataLayout geometry of one unpacked aggregate plane

Syntax:

#simulation.storage_layout<
  uint64_t,   # size
  uint64_t,   # alignment
  uint64_t,   # stride
  ::mlir::DenseI64ArrayAttr   # offsets
>

Sizes, ABI alignment, array stride and declaration-order struct offsets are in bytes. Semantic normalization obtains these from the target LLVM array/struct type. Native and bytecode backends share this layout; packed leaves retain their exact SystemVerilog bit width. An absent encoding denotes the legacy, target-independent Simulation IR layout.

Parameters:

Parameter	C++ type	Description
size	uint64_t
alignment	uint64_t
stride	uint64_t
offsets	::mlir::DenseI64ArrayAttr

TimingPathConditionAttr

The condition of a module path

Syntax:

#simulation.timing_path_condition<
  ::talos::sim::TimingPathConditionKind,   # kind
  uint32_t,   # group
  std::optional<uint64_t>,   # node
  ::mlir::FlatSymbolRefAttr,   # evaluator
  ::mlir::ArrayAttr   # captures
>

Paths of one destination with the same group are alternatives selected by their condition. An if path names its condition expression node; once its observer is outlined, evaluator computes the condition from the unit-local captures.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::TimingPathConditionKind	an enum of type TimingPathConditionKind
group	uint32_t
node	std::optional<uint64_t>
evaluator	::mlir::FlatSymbolRefAttr
captures	::mlir::ArrayAttr

TimingPathEdgeAttr

The edge qualification of an edge-sensitive module path

Syntax:

#simulation.timing_path_edge<
  uint32_t,   # identifier
  uint32_t,   # polarity
  ::mlir::StringAttr,   # pending
  ::mlir::StringAttr   # epoch
>

identifier is the source edge (0 any change, 1 posedge, 2 negedge, 3 edge) and polarity the data path polarity (0 none, 1 +, 2 -), IEEE 1800-2023 30.4.3. Storage at pending and epoch holds the qualified destination bits and their qualification time.

Parameters:

Parameter	C++ type	Description
identifier	uint32_t
polarity	uint32_t
pending	::mlir::StringAttr
epoch	::mlir::StringAttr

TimingPathMonitorAttr

Source monitoring for a procedural module path

Syntax:

#simulation.timing_path_monitor<
  ::mlir::ArrayAttr,   # inputs
  ::mlir::ArrayAttr,   # snapshots
  ::talos::sim::TimingPathSelectionAttr,   # selection
  ::talos::sim::TimingPathEdgeAttr,   # edge
  ::talos::sim::TimingPathConditionAttr   # condition
>

The writer that monitors an edge-sensitive procedural path qualifies destination bits when the source terminals inputs change, compared with snapshots.

Parameters:

Parameter	C++ type	Description
inputs	::mlir::ArrayAttr
snapshots	::mlir::ArrayAttr
selection	::talos::sim::TimingPathSelectionAttr
edge	::talos::sim::TimingPathEdgeAttr
condition	::talos::sim::TimingPathConditionAttr

TimingPathProceduralAttr

A module path whose destination procedures write

Syntax:

#simulation.timing_path_procedural<
  uint64_t,   # site
  uint32_t,   # wakeKind
  bool   # monitor
>

The destination is procedural storage with descriptor site. wakeKind classifies the writer that applies the path (1 and 2 qualify writes, 3 only cancels); monitor is set on the writer that monitors the sources.

Parameters:

Parameter	C++ type	Description
site	uint64_t
wakeKind	uint32_t
monitor	bool

TimingPathRuleAttr

One module path delay applied to a path destination

Syntax:

#simulation.timing_path_rule<
  ::mlir::ArrayAttr,   # inputs
  ::mlir::ArrayAttr,   # snapshots
  uint32_t,   # polarity
  ::mlir::DenseI64ArrayAttr,   # delays
  ::mlir::DenseI64ArrayAttr,   # pulseReject
  ::mlir::DenseI64ArrayAttr,   # pulseError
  bool,   # pulseOnDetect
  bool,   # pulseShowCancelled
  ::talos::sim::TimingPathSelectionAttr,   # selection
  ::talos::sim::TimingPathEdgeAttr,   # edge
  ::talos::sim::TimingPathProceduralAttr,   # procedural
  ::talos::sim::TimingPathConditionAttr   # condition
>

Changes of the source terminals inputs, compared with their previous values in snapshots, schedule the destination after delays (1, 2, 3, 6 or 12 transition delays) with path polarity (0 none, 1 +, 2 -). Pulses shorter than pulseReject are filtered and shorter than pulseError produce X (IEEE 1800-2023 30.7), as configured by pulseOnDetect and pulseShowCancelled.

Parameters:

Parameter	C++ type	Description
inputs	::mlir::ArrayAttr
snapshots	::mlir::ArrayAttr
polarity	uint32_t
delays	::mlir::DenseI64ArrayAttr
pulseReject	::mlir::DenseI64ArrayAttr
pulseError	::mlir::DenseI64ArrayAttr
pulseOnDetect	bool
pulseShowCancelled	bool
selection	::talos::sim::TimingPathSelectionAttr
edge	::talos::sim::TimingPathEdgeAttr
procedural	::talos::sim::TimingPathProceduralAttr
condition	::talos::sim::TimingPathConditionAttr

TimingPathSelectionAttr

The bits a module path connects

Syntax:

#simulation.timing_path_selection<
  ::mlir::DenseI64ArrayAttr,   # inputLows
  ::mlir::DenseI64ArrayAttr,   # inputWidths
  ::mlir::DenseI64ArrayAttr,   # inputLsbs
  uint64_t,   # outputLow
  uint64_t,   # outputWidth
  uint64_t,   # outputRootWidth
  bool,   # full
  std::optional<uint64_t>   # driverNode
>

Source terminal i contributes bits inputLows[i] to inputLows[i] + inputWidths[i] - 1; edge-sensitive paths also name the least significant source bit inputLsbs[i] that qualifies the edge. The path drives outputWidth bits from outputLow of a destination of outputRootWidth bits, through a full (*>) or parallel (=>) connection, from the continuous driver with node driverNode.

Parameters:

Parameter	C++ type	Description
inputLows	::mlir::DenseI64ArrayAttr
inputWidths	::mlir::DenseI64ArrayAttr
inputLsbs	::mlir::DenseI64ArrayAttr
outputLow	uint64_t
outputWidth	uint64_t
outputRootWidth	uint64_t
full	bool
driverNode	std::optional<uint64_t>

UdpAttr

The declaration of a user-defined primitive

Syntax:

#simulation.udp<
  ::mlir::StringAttr,   # name
  ::mlir::ArrayAttr,   # ports
  ::mlir::DenseI64ArrayAttr,   # portDirections
  bool,   # sequential
  bool,   # edgeSensitive
  ::mlir::StringAttr,   # initValue
  ::mlir::ArrayAttr   # rows
>

Primitive name with ports listed output first, their frontend portDirections, and its table rows (IEEE 1800-2023 29). A sequential primitive may declare its initial output initValue.

Parameters:

Parameter	C++ type	Description
name	::mlir::StringAttr
ports	::mlir::ArrayAttr
portDirections	::mlir::DenseI64ArrayAttr
sequential	bool
edgeSensitive	bool
initValue	::mlir::StringAttr
rows	::mlir::ArrayAttr

UdpRowAttr

One row of a user-defined primitive table

Syntax:

#simulation.udp_row<
  ::mlir::StringAttr,   # inputs
  ::mlir::StringAttr,   # state
  ::mlir::StringAttr,   # output
  bool   # edge
>

The input field inputs (levels, edges and (vw) transitions), the current state symbol of a sequential primitive (empty for a combinational one) and the output symbol (IEEE 1800-2023 29.3.6). edge marks a row with an edge.

Parameters:

Parameter	C++ type	Description
inputs	::mlir::StringAttr
state	::mlir::StringAttr
output	::mlir::StringAttr
edge	bool

VPIObjectBackingAttr

Physical executable descriptor backing a source VPI object

Syntax:

#simulation.vpi_backing<
  ::talos::sim::VPIObjectBackingKind,   # kind
  ::mlir::IntegerAttr,   # id
  ::mlir::FlatSymbolRefAttr   # symbol
>

Maps one immutable source-object anchor to an already materialized scope, class, code-unit, or net descriptor. Scope, code-unit, and net backings use id; class backings use symbol. An anchor without this attribute is itself serialized as a static-only reflection object.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::VPIObjectBackingKind	an enum of type VPIObjectBackingKind
id	::mlir::IntegerAttr
symbol	::mlir::FlatSymbolRefAttr

VPIObjectRefAttr

Stable logical reference to a VPI-visible design object

Syntax:

#simulation.vpi_ref<
  ::talos::sim::VPIObjectRefKind,   # kind
  ::mlir::IntegerAttr,   # id
  ::mlir::FlatSymbolRefAttr   # symbol
>

Identifies an existing immutable design-inventory declaration without exposing its eventual reflection-image table index. Each reference kind has its own stable ID namespace. Symbol references name immutable object anchors, typespecs, or nettype declarations in the design symbol table. Backed anchors also reference executable scopes and code units. The serializer resolves references only after physical records have been sorted. DefinitionMember carries both an exact instance scope ID and a shared member symbol. Its context is checked against the scope definition; it is never encoded as an ordinary physical table index.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::VPIObjectRefKind	an enum of type VPIObjectRefKind
id	::mlir::IntegerAttr
symbol	::mlir::FlatSymbolRefAttr

VPIPropertyAttr

One typed immutable VPI property value

Syntax:

#simulation.vpi_property<
  ::mlir::IntegerAttr,   # selector
  ::mlir::Attribute   # value
>

Parameters:

Parameter	C++ type	Description
selector	::mlir::IntegerAttr
value	::mlir::Attribute

VPIPropertySetAttr

Sorted unique immutable VPI property values

Syntax:

#simulation.vpi_properties<
  ::mlir::ArrayAttr   # properties
>

Parameters:

Parameter	C++ type	Description
properties	::mlir::ArrayAttr

VPITypeSemanticsAttr

Source-semantic type retained for VPI reflection

Syntax:

#simulation.vpi_type<
  ::talos::sim::VPITypeKind,   # kind
  bool,   # isSigned
  bool,   # isFourState
  ::mlir::StringAttr,   # name
  ::mlir::SymbolRefAttr,   # symbol
  ::mlir::StringAttr,   # modport
  ::mlir::DenseI64ArrayAttr,   # range
  ::mlir::ArrayAttr,   # children
  ::mlir::ArrayAttr,   # childNames
  ::mlir::BoolAttr,   # isTagged
  ::mlir::BoolAttr,   # isSoft
  ::mlir::IntegerAttr,   # bitWidth
  ::mlir::IntegerAttr,   # selectableWidth
  ::mlir::IntegerAttr,   # bitstreamWidth
  ::mlir::IntegerAttr,   # tagBits
  ::mlir::IntegerAttr,   # queueBound
  ::mlir::BoolAttr,   # wildcardIndex
  ::mlir::DenseI64ArrayAttr,   # childOrdinals
  ::mlir::DenseI64ArrayAttr,   # childPackedOffsets
  ::mlir::DenseI64ArrayAttr,   # childRandTypes
  ::mlir::ArrayAttr,   # typedefAliases
  ::mlir::BoolAttr   # projected
>

Preserves source type identity after executable lowering normalizes integer flavors, enums, time, and managed values. children contains the enum base type, array/container element type, associative key and element, or declaration-ordered aggregate fields as appropriate. Aggregate layout, container bounds, wildcard indexing, virtual-interface modports, symbolic declaration identity, and typedef layers are retained in typed optional payloads. This attribute is immutable inventory only and must not participate in executable type conversion or scheduler decisions.

Parameters:

Parameter	C++ type	Description
kind	::talos::sim::VPITypeKind	an enum of type VPITypeKind
isSigned	bool
isFourState	bool
name	::mlir::StringAttr
symbol	::mlir::SymbolRefAttr
modport	::mlir::StringAttr
range	::mlir::DenseI64ArrayAttr
children	::mlir::ArrayAttr
childNames	::mlir::ArrayAttr
isTagged	::mlir::BoolAttr
isSoft	::mlir::BoolAttr
bitWidth	::mlir::IntegerAttr
selectableWidth	::mlir::IntegerAttr
bitstreamWidth	::mlir::IntegerAttr
tagBits	::mlir::IntegerAttr
queueBound	::mlir::IntegerAttr
wildcardIndex	::mlir::BoolAttr
childOrdinals	::mlir::DenseI64ArrayAttr
childPackedOffsets	::mlir::DenseI64ArrayAttr
childRandTypes	::mlir::DenseI64ArrayAttr
typedefAliases	::mlir::ArrayAttr
projected	::mlir::BoolAttr

VirtualInterfaceCalleeAttr

One candidate of a call through a virtual interface

Syntax:

#simulation.virtual_interface_callee<
  uint64_t,   # scope
  ::mlir::FlatSymbolRefAttr,   # callee
  ::mlir::ArrayAttr,   # captures
  ::mlir::ArrayAttr,   # reads
  ::mlir::ArrayAttr   # writes
>

Calls callee when the virtual interface selects the instance with scope scope. captures lists the unit-local paths passed as arguments, reads and writes the paths the callee reads and writes.

Parameters:

Parameter	C++ type	Description
scope	uint64_t
callee	::mlir::FlatSymbolRefAttr
captures	::mlir::ArrayAttr
reads	::mlir::ArrayAttr
writes	::mlir::ArrayAttr

VirtualInterfaceEventAttr

A clocking event an interface instance owns

Syntax:

#simulation.virtual_interface_event<
  ::mlir::StringAttr,   # member
  uint64_t   # descriptor
>

The event member of the interface instance has event descriptor descriptor.

Parameters:

Parameter	C++ type	Description
member	::mlir::StringAttr
descriptor	uint64_t

VirtualInterfaceMemberAttr

A nested interface instance selected through a virtual one

Syntax:

#simulation.virtual_interface_member<
  ::mlir::StringAttr,   # member
  ::mlir::SymbolRefAttr   # interface
>

Selects the interface instance member, whose interface is interface, from the previously selected instance.

Parameters:

Parameter	C++ type	Description
member	::mlir::StringAttr
interface	::mlir::SymbolRefAttr

Types

ArgumentRefType

Polymorphic exact-alias subroutine reference

Syntax:

!simulation.argument_ref<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

AssocArrayType

Managed SystemVerilog associative array value

Syntax:

!simulation.assoc_array<
  ::mlir::Type,   # keyType
  ::mlir::Type,   # elementType
  bool,   # signedKey
  bool   # wildcardIndex
>

Parameters:

Parameter	C++ type	Description
keyType	::mlir::Type
elementType	::mlir::Type
signedKey	bool
wildcardIndex	bool

BoxType

Type-erased singular value stored by an untyped mailbox

Syntax: !simulation.box

BytesType

Immutable literal byte sequence

Syntax: !simulation.bytes

This type is intentionally limited to compiler-owned byte spans such as static display formats. Dynamic SystemVerilog strings use !simulation.string and the managed-word ABI instead.

ChandleType

Nullable opaque DPI C pointer

Syntax: !simulation.chandle

ClassHandleType

Nullable statically typed managed class handle

Syntax:

!simulation.class_handle<
  ::mlir::SymbolRefAttr   # className
>

Parameters:

Parameter	C++ type	Description
className	::mlir::SymbolRefAttr

ContextType

Opaque simulator and design context

Syntax: !simulation.context

ControlType

Opaque dynamic named-control activation token

Syntax: !simulation.control

CovergroupHandleType

Nullable statically typed functional coverage handle

Syntax:

!simulation.covergroup_handle<
  ::mlir::SymbolRefAttr   # covergroupName
>

Parameters:

Parameter	C++ type	Description
covergroupName	::mlir::SymbolRefAttr

DPIOpenArrayType

Unbound DPI open-array formal shape

Syntax:

!simulation.dpi_open_array<
  ::mlir::Type,   # elementType
  bool   # isPacked
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
isPacked	bool

DriverType

Typed static net-driver handle

Syntax:

!simulation.driver<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

DynamicArrayType

Managed SystemVerilog dynamic array value

Syntax:

!simulation.dynamic_array<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

EventType

Opaque scheduler event handle

Syntax: !simulation.event

LogicType

Fixed-width exact four-state packed value

Syntax:

!simulation.logic<
  unsigned   # width
>

Parameters:

Parameter	C++ type	Description
width	unsigned

MailboxType

Managed typed SystemVerilog mailbox handle

Syntax:

!simulation.mailbox<
  ::mlir::Type,   # elementType
  uint64_t   # specialization
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
specialization	uint64_t

ManagedRefType

Typed managed field reference with an owning object

Syntax:

!simulation.managed_ref<
  ::mlir::Type,   # elementType
  ::mlir::SymbolRefAttr   # ownerClass
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
ownerClass	::mlir::SymbolRefAttr

ManagedWatchType

Stable runtime token for one managed mutation dependency

Syntax: !simulation.managed_watch

NetType

Typed resolved net handle

Syntax:

!simulation.net<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

ObserverType

Bound zero-time computed timing evaluator

Syntax:

!simulation.observer<
  ::mlir::Type   # resultType
>

Parameters:

Parameter	C++ type	Description
resultType	::mlir::Type

PackedArrayType

Fixed-size packed array with its declared source range

Syntax:

!simulation.packed_array<
  ::mlir::Type,   # elementType
  int64_t,   # left
  int64_t   # right
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
left	int64_t
right	int64_t

PackedStructType

Ordered fixed packed struct

Syntax:

!simulation.packed_struct<
  ::mlir::ArrayAttr   # fields
>

Parameters:

Parameter	C++ type	Description
fields	::mlir::ArrayAttr

PackedUnionType

Ordered fixed packed union

Syntax:

!simulation.packed_union<
  ::mlir::ArrayAttr,   # fields
  bool,   # isTagged
  uint32_t   # tagBits
>

Parameters:

Parameter	C++ type	Description
fields	::mlir::ArrayAttr
isTagged	bool
tagBits	uint32_t

ProcessType

Opaque scheduler process handle

Syntax: !simulation.process

QueueType

Managed SystemVerilog queue value

Syntax:

!simulation.queue<
  ::mlir::Type,   # elementType
  uint32_t   # bound
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
bound	uint32_t

RefType

Typed mutable storage handle

Syntax:

!simulation.ref<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

ReferencePathType

Managed escaping dynamic-lvalue path

Syntax:

!simulation.reference_path<
  ::mlir::Type   # elementType
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type

SemaphoreType

Managed SystemVerilog semaphore handle

Syntax: !simulation.semaphore

StringType

Nullable immutable managed SystemVerilog string

Syntax: !simulation.string

TimeType

Target-independent scaled simulation time

Syntax: !simulation.time

UnpackedArrayType

Fixed-size unpacked array with its declared source range

Syntax:

!simulation.unpacked_array<
  ::mlir::Type,   # elementType
  int64_t,   # left
  int64_t,   # right
  ::mlir::Attribute   # layout
>

Parameters:

Parameter	C++ type	Description
elementType	::mlir::Type
left	int64_t
right	int64_t
layout	::mlir::Attribute

UnpackedStructType

Ordered fixed unpacked struct

Syntax:

!simulation.unpacked_struct<
  ::mlir::ArrayAttr,   # fields
  ::mlir::Attribute   # layout
>

Parameters:

Parameter	C++ type	Description
fields	::mlir::ArrayAttr
layout	::mlir::Attribute

UnpackedUnionType

Ordered fixed unpacked union

Syntax:

!simulation.unpacked_union<
  ::mlir::ArrayAttr,   # fields
  bool,   # isTagged
  uint32_t   # tagBits
>

Parameters:

Parameter	C++ type	Description
fields	::mlir::ArrayAttr
isTagged	bool
tagBits	uint32_t

VirtualInterfaceType

Nullable statically typed virtual interface handle

Syntax:

!simulation.virtual_interface<
  ::mlir::StringAttr,   # interfaceName
  ::mlir::StringAttr   # modport
>

Parameters:

Parameter	C++ type	Description
interfaceName	::mlir::StringAttr
modport	::mlir::StringAttr

Enums

ABIKind

DPI-C value ABI category

Cases:

Symbol	Value	String
Bit	0	bit
Logic	1	logic
Byte	2	byte
ShortInt	3	shortint
Int	4	int
LongInt	5	longint
BitVector	6	bit_vector
LogicVector	7	logic_vector
String	8	string
Chandle	9	chandle
ShortReal	10	shortreal
Real	11	real
OpenArray	12	open_array
UnpackedAggregate	13	unpacked_aggregate

ArgumentDirection

DPI-C ABI value role

Cases:

Symbol	Value	String
Input	0	input
Output	1	output
InOut	2	inout
Result	3	result

AssertionControlAction

Simulation assertion control action

Cases:

Symbol	Value	String
Lock	1	lock
Unlock	2	unlock
On	3	on
Off	4	off
Kill	5	kill
PassOn	6	pass_on
PassOff	7	pass_off
FailOn	8	fail_on
FailOff	9	fail_off
NonvacuousOn	10	nonvacuous_on
VacuousOff	11	vacuous_off

AssocKeyKind

Simulation assoc key kind

Cases:

Symbol	Value	String
Unsigned	1	unsigned
Signed	2	signed
String	3	string
Class	4	class
Process	5	process
Wildcard	6	wildcard
Element	7	element

AssocTraversalDirection

Simulation assoc traversal direction

Cases:

Symbol	Value	String
Forward	1	forward
Backward	4294967295	backward

BinaryKind

Normalized four-state binary operation

Cases:

Symbol	Value	String
Add	0	add
Sub	1	sub
Mul	2	mul
UDiv	3	udiv
SDiv	4	sdiv
UMod	5	umod
SMod	6	smod
And	7	and
Or	8	or
Xor	9	xor
Xnor	10	xnor

BlockEventKind

Simulation block event kind

Cases:

Symbol	Value	String
Begin	0	begin
End	1	end

BooleanMinimizationScope

Minimized property operand

Cases:

Symbol	Value	String
Antecedent	0	antecedent
Consequent	1	consequent
Property	2	property

CaptureKind

Entry argument binding kind

Cases:

Symbol	Value	String
Context	0	context
Formal	1	formal
Value	2	value
Storage	3	storage
Net	4	net
Driver	5	driver
Event	6	event

CompareKind

Normalized comparison operation

Cases:

Symbol	Value	String
Eq	0	eq
Ne	1	ne
CaseEq	2	case_eq
CaseNe	3	case_ne
ULT	4	ult
ULE	5	ule
UGT	6	ugt
UGE	7	uge
SLT	8	slt
SLE	9	sle
SGT	10	sgt
SGE	11	sge
WildEq	12	wild_eq
WildNe	13	wild_ne
CaseZEq	14	casez_eq
CaseXZEq	15	casexz_eq

ComputeActionKind

Fragment terminal action

Cases:

Symbol	Value	String
Continue	0	continue
SuspendDelay	1	suspend_delay
SuspendChange	2	suspend_change
SuspendEdge	3	suspend_edge
SuspendAny	4	suspend_any
SuspendEvent	5	suspend_event
SuspendAwait	6	suspend_await
SuspendJoin	7	suspend_join
Terminate	8	terminate
TaskCall	9	task_call
SuspendChildren	10	suspend_children
SuspendObserve	11	suspend_observe
ProcessControl	12	process_control
SuspendMailbox	13	suspend_mailbox
SuspendSemaphore	14	suspend_semaphore

ComputeEdgeKind

Compute-graph edge kind

Cases:

Symbol	Value	String
ProcessOrder	0	process_order
Resume	1	resume
Spawn	2	spawn
Sensitivity	3	sensitivity
NBAStage	4	nba_stage
NBAActivate	5	nba_activate
Conflict	6	conflict
DeferredStage	7	deferred_stage
DeferredActivate	8	deferred_activate

ComputeEffectKind

Compute-graph effect kind

Cases:

Symbol	Value	String
Read	0	read
Write	1	write
Drive	2	drive
Watch	3	watch
NBA	4	nba
Trigger	5	trigger

ComputeNBAStorageKind

Generated NBA staging policy

Cases:

Symbol	Value	String
FixedSlot	0	fixed_slot
RootAccumulator	1	root_accumulator
DynamicFrontier	2	dynamic_frontier

ComputeObservabilityKind

VPI state observability

Cases:

Symbol	Value	String
Invisible	0	invisible
SafePoint	1	safe_point
ExternallyWritable	2	externally_writable

ComputeRegionKind

Simulation event-region kind

Cases:

Symbol	Value	String
Active	0	active
NBA	1	nba
Observed	2	observed
Reactive	3	reactive
Postponed	4	postponed

ComputeResourceKind

Compute-graph resource kind

Cases:

Symbol	Value	String
Unknown	0	unknown
Storage	1	storage
Net	2	net
Event	3	event
Local	4	local

ComputeScheduleKind

Compute-group execution mode

Cases:

Symbol	Value	String
Acyclic	0	acyclic
ControlLoop	1	control_loop
Convergence	2	convergence

ComputeTargetKind

Compute-effect target kind

Cases:

Symbol	Value	String
Unknown	0	unknown
Descriptor	1	descriptor
Formal	2	formal
Local	3	local

ComputeTierKind

Fragment implementation tier

Cases:

Symbol	Value	String
Native	0	native
Bytecode	1	bytecode
Generated	2	generated

ComputeTimingKind

Compiled timing-site kind

Cases:

Symbol	Value	String
Calendar	0	calendar
DeadlineSlot	1	deadline_slot
DelayedNBA	2	delayed_nba
DelayedEvent	3	delayed_event

ComputeTriggerKind

Compute-graph trigger kind

Cases:

Symbol	Value	String
None	0	none
Change	1	change
Posedge	2	posedge
Negedge	3	negedge
Both	4	both
Event	5	event

ComputeVPIMode

VPI compilation mode

Cases:

Symbol	Value	String
Off	0	off
Read	1	read
Full	2	full

ContainerKind

Simulation container kind

Cases:

Symbol	Value	String
DynamicArray	1	dynamic_array
Queue	2	queue

CoveragePointKind

Simulation coverage point kind

Cases:

Symbol	Value	String
Line	0	line
Assertion	1	assertion

CovergroupInstanceOptionKind

Functional-coverage option

Cases:

Symbol	Value	String
Weight	1	weight
Goal	2	goal
Comment	3	comment
AtLeast	4	at_least
MergeInstances	5	merge_instances
CrossNumPrintMissing	6	cross_num_print_missing
DistributeFirst	7	distribute_first
AutoBinMax	8	auto_bin_max
DetectOverlap	9	detect_overlap
PerInstance	10	per_instance
GetInstCoverage	11	get_inst_coverage
CrossRetainAutoBins	12	cross_retain_auto_bins
Name	13	name

DumpPortsAction

EVCD session control action

Cases:

Symbol	Value	String
Off	0	off
On	1	on
All	2	all
Flush	3	flush
Limit	4	limit

EdgeKind

Suspension edge kind

Cases:

Symbol	Value	String
Change	0	change
Posedge	1	posedge
Negedge	2	negedge
Both	3	both

ElementFlags

Simulation element flags

Cases:

Symbol	Value	String
None	0	none
FourState	1	four_state
Signed	2	signed

ElementKind

Simulation element kind

Cases:

Symbol	Value	String
Bits	1	bits
Logic	2	logic
Real	3	real
ClassHandle	4	class_handle
String	5	string
ContainerHandle	6	container_handle
Aggregate	7	aggregate
Event	8	event

EntryKind

Simulation code-unit kind

Cases:

Symbol	Value	String
RootInitializer	0	root_initializer
Initial	1	initial
Final	2	final
Always	3	always
AlwaysComb	4	always_comb
AlwaysFF	5	always_ff
AlwaysLatch	6	always_latch
Continuous	7	continuous
Function	8	function
PortInput	9	port_input
PortOutput	10	port_output
PortInitialize	11	port_initialize
Task	12	task
Fork	13	fork
Observer	14	observer

EventRegion

IEEE executable event-region queue

Cases:

Symbol	Value	String
Preponed	0	preponed
PreActive	1	pre_active
Active	2	active
Inactive	3	inactive
PreNBA	4	pre_nba
NBA	5	nba
PostNBA	6	post_nba
PreObserved	7	pre_observed
Observed	8	observed
PostObserved	9	post_observed
Reactive	10	reactive
ReInactive	11	re_inactive
PreReNBA	12	pre_re_nba
ReNBA	13	re_nba
PostReNBA	14	post_re_nba
PrePostponed	15	pre_postponed
Postponed	16	postponed

ExecutionDomain

Procedural scheduling domain

Cases:

Symbol	Value	String
Design	0	design
Program	1	program

FormalDirection

Subroutine formal argument direction

Cases:

Symbol	Value	String
In	0	in
Out	1	out
InOut	2	inout
Ref	3	ref

IntegerExpressionKind

Integer return summary node

Cases:

Symbol	Value	String
Constant	0	constant
Argument	1	argument
Identity	2	identity
SExt	3	sext
ZExt	4	zext
Trunc	5	trunc
Add	6	add
Sub	7	sub
Mul	8	mul
And	9	and
Or	10	or
Xor	11	xor

JoinKind

Process join mode

Cases:

Symbol	Value	String
All	0	all
Any	1	any

Lifetime

Simulation object lifetime

Cases:

Symbol	Value	String
Automatic	0	automatic
Static	1	static
Design	2	design

LogicalKind

Four-state logical operation

Cases:

Symbol	Value	String
And	0	and
Or	1	or

MailboxWaitKind

Mailbox readiness predicate

Cases:

Symbol	Value	String
NotEmpty	0	not_empty
NotFull	1	not_full

ManagedRootMode

Managed root classification

Cases:

Symbol	Value	String
Exact	0	exact
Candidate	1	candidate

ManagedWatchKind

Managed mutation dependency

Cases:

Symbol	Value	String
Field	1	field
ContainerSize	2	container_size

MemberVisibility

Class member visibility

Cases:

Symbol	Value	String
Public	0	public
Protected	1	protected
Local	2	local

NativeSchedulerMode

Native scheduling policy

Cases:

Symbol	Value	String
Auto	0	auto
Generic	1	generic
AOT	2	aot
Eval	3	eval

NetResolutionKind

Supported net resolution kind

Cases:

Symbol	Value	String
Wire	0	wire
Tri	1	tri
UWire	2	uwire
WAnd	3	wand
WOr	4	wor
Tri0	5	tri0
Tri1	6	tri1
Supply0	7	supply0
Supply1	8	supply1
TriReg	9	trireg

PortDirection

Elaborated module-port direction

Cases:

Symbol	Value	String
Input	0	input
Output	1	output
InOut	2	inout

ProcessControlKind

Process object control kind

Cases:

Symbol	Value	String
Kill	0	kill
Suspend	1	suspend
Resume	2	resume

Radix

Simulation radix

Cases:

Symbol	Value	String
Binary	2	binary
Octal	8	octal
Decimal	10	decimal
Hex	16	hex

RandomConstraintBlockReferenceKind

Constraint template mode-state root

Cases:

Symbol	Value	String
ObjectBlock	0	object_block
Storage	1	storage

RandomDistribution

Simulation random distribution

Cases:

Symbol	Value	String
Uniform	0	uniform
Normal	1	normal
Exponential	2	exponential
Poisson	3	poisson
ChiSquare	4	chi_square
T	5	t
Erlang	6	erlang

RandomValueReferenceKind

Symbolic random-constraint value root

Cases:

Symbol	Value	String
ObjectField	0	object_field
Storage	1	storage

RandomVariableKind

Direct packed random class-property kind

Cases:

Symbol	Value	String
Rand	1	rand
RandC	2	randc

ReductionKind

Normalized four-state reduction

Cases:

Symbol	Value	String
And	0	and
Or	1	or
Xor	2	xor
Nand	3	nand
Nor	4	nor
Xnor	5	xnor

SchedulerTierKind

Generated scheduler ownership tier

Cases:

Symbol	Value	String
Tier1	1	tier1
Tier2	2	tier2
Tier3	3	tier3

ShiftKind

Four-state shift operation

Cases:

Symbol	Value	String
Left	0	left
Right	1	right
RightArith	2	right_arith

StochasticQueueAction

Simulation stochastic queue action

Cases:

Symbol	Value	String
Initialize	0	initialize
Add	1	add
Remove	2	remove
Full	3	full
Exam	4	exam

Strength

Signal strength scale position

Cases:

Symbol	Value	String
HighZ	0	highz
Small	1	small
Medium	2	medium
Weak	3	weak
Large	4	large
Pull	5	pull
Strong	6	strong
Supply	7	supply

TimingPathConditionKind

Module path condition

Cases:

Symbol	Value	String
Unconditional	0	none
If	1	if
IfNone	2	ifnone

UnaryKind

Normalized four-state unary operation

Cases:

Symbol	Value	String
Plus	0	plus
Negate	1	negate
BitNot	2	bit_not
LogicalNot	3	logical_not

UnitArgumentKind

Frozen unit argument binding role

Cases:

Symbol	Value	String
Direct	0	direct
LValueOnly	1	lvalue_only
FormalLocal	2	formal_local
CopyOutDestination	3	copy_out_destination

VPIIODirection

Source IO-declaration direction

Cases:

Symbol	Value	String
Undefined	0	undefined
Input	1	input
Output	2	output
InOut	3	inout
Mixed	4	mixed
None	5	none
Ref	6	ref

VPIObjectBackingKind

Physical descriptor backing a VPI anchor

Cases:

Symbol	Value	String
Scope	0	scope
Class	1	class
CodeUnit	2	code_unit
Net	3	net
Storage	4	storage

VPIObjectRefKind

Stable VPI relation endpoint identity

Cases:

Symbol	Value	String
Statement	0	statement
Storage	1	storage
Net	2	net
NetIdentity	3	net_identity
Port	4	port
Symbol	5	symbol
DefinitionMember	6	definition_member

VPIRelationMode

VPI relation access mode

Cases:

Symbol	Value	String
Handle	0	handle
Iterate	1	iterate

VPIStatementSourceKind

VPI statement-relation source kind

Cases:

Symbol	Value	String
Scope	0	scope
CodeUnit	1	code_unit
Statement	2	statement
Anchor	3	anchor

VPITypeKind

Source-semantic VPI reflection type category

Cases:

Symbol	Value	String
Unknown	0	unknown
GenericIntegral	1	generic_integral
Bit	2	bit
Logic	3	logic
Reg	4	reg
Byte	5	byte
ShortInt	6	shortint
Int	7	int
LongInt	8	longint
Integer	9	integer
Enum	10	enum
Time	11	time
ShortReal	12	shortreal
Real	13	real
Realtime	14	realtime
String	15	string
Chandle	16	chandle
PackedArray	17	packed_array
UnpackedArray	18	unpacked_array
PackedStruct	19	packed_struct
UnpackedStruct	20	unpacked_struct
PackedUnion	21	packed_union
UnpackedUnion	22	unpacked_union
DynamicArray	23	dynamic_array
Queue	24	queue
AssocArray	25	assoc_array
Class	26	class
VirtualInterface	27	virtual_interface
Event	28	event
PackedOpenArray	29	packed_open_array
UnpackedOpenArray	30	unpacked_open_array
Process	31	process
Covergroup	32	covergroup
Mailbox	33	mailbox
Semaphore	34	semaphore
Void	35	void
Untyped	36	untyped
Sequence	37	sequence
Property	38	property

VPITypespecOrigin

VPI typespec inventory origin

Cases:

Symbol	Value	String
Typedef	0	typedef
Interface	1	interface
AnonymousEnum	2	anonymous_enum
ClassSpecialization	3	class_specialization
BuiltinClass	4	builtin_class
SourceDefault	5	source_default