‘schedule’ Dialect¶

Verified simulation execution plans

Describes effects, activation and ordering dependencies, continuation and timing sites, commit groups, convergence, kernel ownership and execution specialization. Simulation-to-schedule derives these plans; scheduling transforms optimize them; executor conversions consume them.

Operations¶

`schedule.bytes.address` (::talos::schedule::NativeByteAddressOp)¶

Immutable bytes awaiting executable reachability

Syntax:

operation ::= `schedule.bytes.address` $name `=` $value `alignment` $alignment attr-dict `:` qualified(type($result))

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:¶

Attribute	MLIR Type	Description
`name`	::mlir::StringAttr	string attribute
`value`	::mlir::StringAttr	string attribute
`alignment`	::mlir::IntegerAttr	64-bit signless integer attribute

Results:¶

Result	Description
`result`	LLVM pointer type

`schedule.class.method` (::talos::schedule::NativeMethodOp)¶

Class method signature and deterministic dispatch slot

Syntax:

operation ::= `schedule.class.method` $sym_name `of` $owner (`slot` $slot^)?
              (`signature_id` $signature_id^)?
              (`interface_ordinal` $interface_ordinal^)?
              (`implemented_by` $implementation^)? `:` $function_type attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface, Symbol

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::InventoryResource}

Attributes:¶

Attribute	MLIR Type	Description
`sym_name`	::mlir::StringAttr	string attribute
`owner`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
`function_type`	::mlir::TypeAttr	any type attribute
`native_type`	::mlir::TypeAttr	any type attribute
`slot`	::mlir::IntegerAttr	64-bit signless integer attribute
`signature_id`	::mlir::IntegerAttr	64-bit signless integer attribute
`interface_ordinal`	::mlir::IntegerAttr	64-bit signless integer attribute
`implementation`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
`is_virtual`	::mlir::BoolAttr	bool attribute
`is_pure`	::mlir::BoolAttr	bool attribute
`is_static`	::mlir::BoolAttr	bool attribute
`is_task`	::mlir::BoolAttr	bool attribute
`is_final`	::mlir::BoolAttr	bool attribute
`debug_name`	::mlir::StringAttr	string attribute

`schedule.class.virtual_task_call` (::talos::schedule::NativeClassVirtualTaskCallOp)¶

Descriptor-dispatched virtual class task activation

Syntax:

operation ::= `schedule.class.virtual_task_call` $receiver `[` $method `]` `slot` $slot
              `signature_id` $signature_id
              `(` $values `)` `arguments` $argument_count `to` $continuation
              attr-dict `:` functional-type(operands, results)

Resolves a virtual task through the receiver’s managed class descriptor, then transfers the current logical process into the selected task activation. The receiver and explicit argument prefix initialize the method inputs after the implicit caller context; remaining values are forwarded to the continuation.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::NetResource, MemoryEffects::Write on ::talos::sim::NetResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::HeapResource, MemoryEffects::Write on ::talos::sim::HeapResource, MemoryEffects::Read on ::talos::sim::IOResource, MemoryEffects::Write on ::talos::sim::IOResource, MemoryEffects::Read on ::talos::sim::RNGResource, MemoryEffects::Write on ::talos::sim::RNGResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:¶

Attribute	MLIR Type	Description
`method`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
`slot`	::mlir::IntegerAttr	64-bit signless integer attribute
`signature_id`	::mlir::IntegerAttr	64-bit signless integer attribute
`argument_count`	::mlir::IntegerAttr	64-bit signless integer attribute
`site`	::talos::schedule::ContinuationSiteAttr

Operands:¶

Operand	Description
`receiver`	64-bit signless integer
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.context` (::talos::schedule::NativeContextOp)¶

Syntax:

operation ::= `schedule.context` $context attr-dict `:` type($result)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`context`	opaque simulator and design context

Results:¶

Result	Description
`result`	LLVM pointer type

`schedule.control.boundary` (::talos::schedule::NativeControlBoundaryOp)¶

Register the resumable exit of a named block activation

Syntax:

operation ::= `schedule.control.boundary` $activation `resume` $resume
              (`(` $resume_operands^ `:` type($resume_operands) `)`)?
              `body` $body attr-dict

The resume successor is the block exit used when another logical process disables this activation. Its operands are checkpointed in the canonical process frame. Ordinary execution registers that continuation and follows the body successor without yielding to the scheduler.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr

Operands:¶

Operand	Description
`activation`	64-bit signless integer
`resume_operands`	variadic of any type

Successors:¶

Successor	Description
`resume`	any successor
`body`	any successor

`schedule.execute` (::talos::schedule::NativeExecuteOp)¶

Invoke a scheduled body through its prepared native ABI

Syntax:

operation ::= `schedule.execute` $callee `(` $operands `)` attr-dict `:` functional-type($operands, $results)

Interfaces: SymbolUserOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`callee`	::mlir::SymbolRefAttr	symbol reference attribute
`status_result`	::mlir::UnitAttr	unit attribute

Operands:¶

Operand	Description
`operands`	variadic of any type

Results:¶

Result	Description
`results`	variadic of any type

`schedule.gc.collect` (::talos::schedule::NativeGCCollectOp)¶

Designated managed-heap collection point

Syntax:

operation ::= `schedule.gc.collect` $runtime_context (`if` $edge^)? attr-dict `:`
              qualified(type($runtime_context))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Attributes:¶

Attribute	MLIR Type	Description
`periodic_clock`	::mlir::IntegerAttr	32-bit signless integer attribute
`period`	::mlir::IntegerAttr	64-bit signless integer attribute
`posedge`	::mlir::UnitAttr	unit attribute

Operands:¶

Operand	Description
`runtime_context`	LLVM pointer type
`edge`	1-bit signless integer

Results:¶

Result	Description
`status`	32-bit signless integer

`schedule.gc.root_range.pop` (::talos::schedule::NativeManagedRootPopOp)¶

Syntax:

operation ::= `schedule.gc.root_range.pop` $record attr-dict `:` qualified(type($record))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Operands:¶

Operand	Description
`record`	LLVM pointer type

`schedule.gc.root_range.push` (::talos::schedule::NativeManagedRootPushOp)¶

Syntax:

operation ::= `schedule.gc.root_range.push` $record `slots` $slots `count` $count (`lazy` $lazy^)? attr-dict `:`
              qualified(type($record)) `,` qualified(type($slots))

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Attributes:¶

Attribute	MLIR Type	Description
`lazy`	::mlir::UnitAttr	unit attribute

Operands:¶

Operand	Description
`record`	LLVM pointer type
`slots`	LLVM pointer type
`count`	64-bit signless integer

Results:¶

Result	Description
`status`	32-bit signless integer

`schedule.known.roots` (::talos::schedule::NativeKnownRootsOp)¶

Test that whole storage roots hold no X or Z

Syntax:

operation ::= `schedule.known.roots` $references attr-dict `:` qualified(type($references))

True when every referenced storage root holds X or Z exactly in the bits of its steady pattern (simulation.steady_unknown, none without one) and nowhere else. Each reference addresses a whole root. Generated code tests one summary bit per root, which every writer that may make the root differ from its pattern sets and the runtime clears after comparing the root’s unknown plane with the pattern, so the predicate never claims a root the summary does not track.

Operands:¶

Operand	Description
`references`	variadic of typed mutable storage handle

Results:¶

Result	Description
`known`	1-bit signless integer

`schedule.known.value` (::talos::schedule::NativeKnownValueOp)¶

Test the complete unknown plane of a fixed native value

Syntax:

operation ::= `schedule.known.value` operands attr-dict `:` functional-type(operands, results)

Establishes that every represented bit of input is two-state. Fixed unpacked arrays and structs retain their native value/unknown planes; there is no bit-stream export, allocation, runtime call or state effect. This predicate proves knownness only, not equality, visibility or bounds.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`input`	any type

Results:¶

Result	Description
`known`	1-bit signless integer

`schedule.nba.batch` (::talos::schedule::NativeNBABatchOp)¶

Commit a certified private set of NBA roots at one barrier

Syntax:

operation ::= `schedule.nba.batch` $context `,` $barrier `,` $changed $body attr-dict
              `:` functional-type(operands, results)

IEEE 1800-2023 4.3, 4.5, 4.6, 4.9.4 and 10.4.2. Executes the commit actions in body at the current NBA barrier. Each root has already captured its RHS, destination and write mask during staging. Admission proves that intermediate values have no observers, except direct generated change consumers covered by the accumulator’s transient mask. No edge, expression, runtime, clocking or external observer may be elided. These proofs concern observation, not source-language visibility.

The region is a non-suspending commit boundary, not a time-slot boundary. Only nba.commit and nba.yield are permitted inside it. Commits may share guards and combine pending consumer activations; they cannot move into Active or across another barrier. Roots whose runtime guard fails remain pending for the canonical commit that must follow this region. A successful root commit consumes its staging record and only its own dirty bit. The changed flag is accumulated, and status reports a runtime error, if any.

Traits: SingleBlock

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::mlir::SideEffects::DefaultResource, MemoryEffects::Write on ::mlir::SideEffects::DefaultResource, MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ExternalResource}

Attributes:¶

Attribute	MLIR Type	Description
`layout`	::talos::schedule::NBABatchLayoutAttr

Operands:¶

Operand	Description
`context`	LLVM pointer type
`barrier`	32-bit signless integer
`changed`	LLVM pointer type

Results:¶

Result	Description
`status`	32-bit signless integer

`schedule.nba.commit` (::talos::schedule::NativeNBACommitOp)¶

Consume certified private accumulator or fixed-slot staging

Syntax:

operation ::= `schedule.nba.commit` $root attr-dict

Traits: HasParent<NativeNBABatchOp>

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource}

Attributes:¶

Attribute	MLIR Type	Description
`root`	::mlir::IntegerAttr	64-bit signless integer attribute
`layout`	::talos::schedule::NBACommitLayoutAttr

`schedule.nba.yield` (::talos::schedule::NativeNBAYieldOp)¶

Finish a private NBA commit region

Syntax:

operation ::= `schedule.nba.yield` attr-dict

Traits: AlwaysSpeculatableImplTrait, HasParent<NativeNBABatchOp>, Terminator

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

`schedule.observer` (::talos::schedule::NativeObserverOp)¶

Computed observer descriptor with physical captures

Syntax:

operation ::= `schedule.observer` `(` ($values^ `:` type($values))? `)` `captures` $capture_count attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:¶

Attribute	MLIR Type	Description
`capture_count`	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:¶

Operand	Description
`values`	variadic of any type

Results:¶

Result	Description
`token`	64-bit signless integer

`schedule.process.control` (::talos::schedule::NativeProcessControlOp)¶

Apply an IEEE control operation to one process object

Syntax:

operation ::= `schedule.process.control` $kind $process `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

This is a control-flow terminator because the target can dynamically name the executing logical process or one of its ancestors. Resuming a process, or controlling another process while the caller survives, transfers immediately to the continuation. Suspending the caller yields and later resumes at that continuation. Killing the caller never reaches it.

A null handle reports a runtime invalid-handle failure. Zero-time function entries may contain this operation; lowering must propagate its control action through the function call chain before coroutine or bytecode materialization.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`kind`	::talos::sim::ProcessControlKindAttr	process object control kind
`site`	::talos::schedule::ContinuationSiteAttr

Operands:¶

Operand	Description
`process`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.ready.commit` (::talos::schedule::NativeReadyCommitOp)¶

Materialize one SSA pending-word update and its indexes

Syntax:

operation ::= `schedule.ready.commit` operands attr-dict `:` functional-type(operands, results)

Replaces a certified unobserved sequence of ordered add/consume actions. The resulting pending word is (previous & ~remove_mask) | add_mask. SSA masks include every intervening consume; event publications remain distinct ordered effects. Materializes the authoritative leaf and derived indexes together before any selection, observer or handoff boundary.

Interfaces: MemoryEffectOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`capacity`	::mlir::IntegerAttr	64-bit signless integer attribute
`word`	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:¶

Operand	Description
`base`	LLVM pointer type
`remove_mask`	64-bit signless integer
`add_mask`	64-bit signless integer

`schedule.ready.merge` (::talos::schedule::NativeReadyMergeOp)¶

Add an ascending bitmap to a pending set and its indexes

Syntax:

operation ::= `schedule.ready.merge` operands attr-dict `:` functional-type(operands, results)

Reads ceil(capacity / 64) i64 words from source in ascending order. Each word is read immediately before adding its bits to the corresponding ReadySetLayout leaf at base and updating that leaf’s indexes. Bits above capacity in the last source word are ignored. Source may overlap base; earlier leaf/index writes are visible to later source reads. Both operands address storage aligned to at least eight bytes.

This is an ordered scheduler effect, with no actor, callback, selection or checkpoint inside it. Pending ready updates must be materialized before the merge, and its leaves, exact summaries and stale-low minimum cache are visible to every subsequent observer. It does not consume the source.

Interfaces: MemoryEffectOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`capacity`	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:¶

Operand	Description
`base`	LLVM pointer type
`source`	LLVM pointer type

`schedule.ready.read` (::talos::schedule::NativeReadyReadOp)¶

Inspect the current pending leaf, including region-local updates

Syntax:

operation ::= `schedule.ready.read` operands attr-dict `:` functional-type(operands, results)

Reads one authoritative pending word without consuming it. Within a ready.region the result includes all preceding ordered add/consume actions in that region; it does not require materializing derived indexes. Opaque accesses, calls and handoffs still require coherent physical storage. This reads pending activation state, not event history (LRM 4.3–4.7).

Interfaces: MemoryEffectOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`capacity`	::mlir::IntegerAttr	64-bit signless integer attribute
`word`	::mlir::IntegerAttr	64-bit signless integer attribute

Operands:¶

Operand	Description
`base`	LLVM pointer type

Results:¶

Result	Description
`value`	64-bit signless integer

`schedule.ready.region` (::talos::schedule::NativeReadyRegionOp)¶

Carry pending readiness through a non-suspending CFG

Syntax:

operation ::= `schedule.ready.region` $body attr-dict (`:` type($results)^)?

Execute the body in source order while representing ready.update and ready.commit actions as local remove/add masks. Materialize pending masks before opaque readiness inspection, potentially aliasing accesses, calls, observers and region exit. Disjoint ordinary storage accesses do not inspect readiness. Signal transitions and NBA actions retain their order and are observation boundaries. This changes pending-set representation, never event history or activation eligibility (IEEE 1800-2023 4.3–4.7). ready.read observes the current local pending word without a flush. The region has no entry arguments; exits use ready.yield, whose operands become the region’s results, so a function that returns a value keeps its CFG inside one region. Only flat CFG branches are allowed, with no suspensions or nested regions.

Traits: RecursiveMemoryEffects

Results:¶

Result	Description
`results`	variadic of any type

`schedule.ready.update` (::talos::schedule::NativeReadyUpdateOp)¶

Add or consume an exact word of pending fine activations

Syntax:

operation ::= `schedule.ready.update` operands attr-dict `:` functional-type(operands, results)

Updates the authoritative ReadySetLayout leaf and its derived indexes. With consume=false it unions mask; with consume=true it removes mask. capacity freezes the ready universe and word identifies the leaf, without recovering either from addresses. These are pending activations, not event history. Ordered updates may be combined only while no selection, observer, callback, opaque alias, or handoff can observe intermediate storage. All leaves/indexes must be materialized at those boundaries.

Interfaces: MemoryEffectOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`capacity`	::mlir::IntegerAttr	64-bit signless integer attribute
`word`	::mlir::IntegerAttr	64-bit signless integer attribute
`consume`	::mlir::BoolAttr	bool attribute

Operands:¶

Operand	Description
`base`	LLVM pointer type
`mask`	64-bit signless integer

`schedule.ready.yield` (::talos::schedule::NativeReadyYieldOp)¶

Materialize pending readiness and leave its region

Syntax:

operation ::= `schedule.ready.yield` ($operands^ `:` type($operands))? attr-dict

Traits: AlwaysSpeculatableImplTrait, HasParent<NativeReadyRegionOp>, Terminator

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`operands`	variadic of any type

`schedule.scratch` (::talos::schedule::NativeScratchOp)¶

Native activation scratch storage that survives status branches

Syntax:

operation ::= `schedule.scratch` $size attr-dict

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Allocate on ::mlir::SideEffects::DefaultResource}

Attributes:¶

Attribute	MLIR Type	Description
`size`	::mlir::IntegerAttr	64-bit signless integer attribute

Results:¶

Result	Description
`result`

`schedule.spawn` (::talos::schedule::NativeSpawnOp)¶

Spawn a sibling simulation process with explicit captures

Syntax:

operation ::= `schedule.spawn` $callee `(` $operands `)` attr-dict
              `:` type($operands) `->` qualified(type($process))

A spawn is a call edge that starts an independent logical process instead of executing in the caller. Its operands are the callee’s entry captures; its result is the scheduler handle of the new process, not a callee result.

Interfaces: ArgAndResultAttrsOpInterface, CallOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`callee`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
`arg_attrs`	::mlir::ArrayAttr	Array of dictionary attributes
`res_attrs`	::mlir::ArrayAttr	Array of dictionary attributes

Operands:¶

Operand	Description
`operands`	variadic of any type

Results:¶

Result	Description
`process`	64-bit signless integer

`schedule.suspend.any` (::talos::schedule::NativeSuspendAnyOp)¶

Suspend until any watched handle observes its requested edge

Syntax:

operation ::= `schedule.suspend.any` $values `edges` $edges `to` $continuation
              attr-dict `:` type($values)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`edges`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.await` (::talos::schedule::NativeSuspendAwaitOp)¶

Suspend until the awaited process terminates

Syntax:

operation ::= `schedule.suspend.await` $process `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Resumes once the target process has finished, whether it terminated normally or was killed. This is used for an explicit task/process await; fork/join synchronization uses suspend.join.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`process`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.change` (::talos::schedule::NativeSuspendChangeOp)¶

Syntax:

operation ::= `schedule.suspend.change` $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict `:` type($watched)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`watched`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.children` (::talos::schedule::NativeSuspendChildrenOp)¶

Suspend until every current direct child has terminated

Syntax:

operation ::= `schedule.suspend.children` `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.clock_set` (::talos::schedule::NativeSuspendClockSetOp)¶

Suspend on an exact set of frozen clock occurrences

Syntax:

operation ::= `schedule.suspend.clock_set` $values `conditions` $condition_count `edges` $edges
              `indices` $condition_indices `site` $occurrence_site
              `to` $continuation attr-dict `:` type($values)

The first edges.size() values are direct signal clock primaries. They are followed by condition_count optional iff handles and then successor operands. condition_indices contains -1 or the condition index for every primary. At most 64 primaries are accepted. The runtime groups all matched primaries from one exact scheduler publication wave into an occurrence mask without coalescing repeated occurrences in that wave. The optional slot_final marker is reserved for Clause 31 coordinators whose simultaneous-event decision needs every producer region at the current numeric simulation time. It changes scheduler admission only; the occurrence ABI and queue representation remain identical.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`condition_count`	::mlir::IntegerAttr	32-bit signless integer attribute
`edges`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`condition_indices`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`condition_predicates`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`occurrence_site`	::mlir::IntegerAttr	64-bit signless integer attribute
`slot_final`	::mlir::UnitAttr	unit attribute
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.delay` (::talos::schedule::NativeSuspendDelayOp)¶

Syntax:

operation ::= `schedule.suspend.delay` $delay `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`timing`	::talos::schedule::TimingSiteAttr
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`delay`	target-independent scaled simulation time
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.edge` (::talos::schedule::NativeSuspendEdgeOp)¶

Syntax:

operation ::= `schedule.suspend.edge` $edge $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`edge`	::talos::sim::EdgeKindAttr	suspension edge kind
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`watched`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.edge_iff` (::talos::schedule::NativeSuspendEdgeIffOp)¶

Suspend until a watched event whose level condition is true

Syntax:

operation ::= `schedule.suspend.edge_iff` $edge $watched `iff` $condition `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched) `,` type($condition)

The condition is a directly addressable packed object. The scheduler samples its complete four-state value when the primary event occurs and latches a successful occurrence for the waiting process. Changes to the condition alone never resume the process. IEEE 1800-2017 9.4.2.3 writes the primary event with an optional edge identifier – its always @(a iff enable == 1) example qualifies a plain value change – so a change edge is as ordinary here as a directed one.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`edge`	::talos::sim::EdgeKindAttr	suspension edge kind
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`watched`	64-bit signless integer
`condition`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.event` (::talos::schedule::NativeSuspendEventOp)¶

Syntax:

operation ::= `schedule.suspend.event` $event `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)? attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`event`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.event_order` (::talos::schedule::NativeSuspendEventOrderOp)¶

Suspend until named events occur in source order or fail

Syntax:

operation ::= `schedule.suspend.event_order` $values `events` $event_count `to` $continuation
              attr-dict `:` type($values)

The first event_count values are event handles in required occurrence order. Remaining values are successor operands. The scheduler observes every event publication synchronously, so an out-of-order occurrence is retained even when several events trigger before the continuation runs.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`event_count`	::mlir::IntegerAttr	32-bit signless integer attribute
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.forever` (::talos::schedule::NativeSuspendForeverOp)¶

Permanently suspend the current logical process

Syntax:

operation ::= `schedule.suspend.forever` `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.join` (::talos::schedule::NativeSuspendJoinOp)¶

Suspend until all or any child process terminates

Syntax:

operation ::= `schedule.suspend.join` $kind $values `processes` $process_count `to`
              $continuation attr-dict `:` type($values)

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`kind`	::talos::sim::JoinKindAttr	process join mode
`process_count`	::mlir::IntegerAttr	64-bit signless integer attribute
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.level` (::talos::schedule::NativeSuspendLevelOp)¶

Suspend until a directly watched packed value becomes true

Syntax:

operation ::= `schedule.suspend.level` $watched `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($watched)

The scheduler evaluates the complete four-state value after every overlapping store and latches the first true occurrence. This preserves a transient true value even if a later store changes it again before the waiting continuation executes.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`watched`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.mailbox` (::talos::schedule::NativeSuspendMailboxOp)¶

Suspend until a mailbox can complete a blocking operation

Syntax:

operation ::= `schedule.suspend.mailbox` $mailbox $kind `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($mailbox)

Suspends on the mailbox’s not-empty or not-full predicate. The mailbox must also be passed to the continuation, which keeps the managed handle in the canonical process frame and therefore rooted while the process waits.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`kind`	::talos::sim::MailboxWaitKindAttr	mailbox readiness predicate
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`mailbox`	64-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.observe` (::talos::schedule::NativeSuspendObserveOp)¶

Suspend on source-ordered computed timing clauses

Syntax:

operation ::= `schedule.suspend.observe` $values `conditions` $condition_count `edges` $edges
              `indices` $condition_indices `to` $continuation attr-dict
              `:` type($values)

Each primary observer has one encounter-time initial value and requested edge. condition_indices has one entry per primary: -1 denotes no iff, otherwise the entry indexes the condition observer list. Conditions are evaluated only after their corresponding primary occurrence.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`condition_count`	::mlir::IntegerAttr	32-bit signless integer attribute
`edges`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`condition_indices`	::mlir::DenseI32ArrayAttr	i32 dense array attribute
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.suspend.semaphore` (::talos::schedule::NativeSuspendSemaphoreOp)¶

Suspend for a FIFO semaphore acquisition

Syntax:

operation ::= `schedule.suspend.semaphore` $keys `from` $semaphore `to` $continuation
              (`(` $continuation_operands^ `:` type($continuation_operands) `)`)?
              attr-dict `:` type($semaphore)

Suspends until this waiter is at the head of the semaphore’s FIFO wait order and the scheduler has atomically obtained the requested keys for it. The handle and key count are copied into the runtime wait record, which is a precise GC root and remains stable across suspension.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::ProcessResource}

Attributes:¶

Attribute	MLIR Type	Description
`site`	::talos::schedule::ContinuationSiteAttr
`resume_region`	::talos::sim::EventRegionAttr	IEEE executable event-region queue

Operands:¶

Operand	Description
`semaphore`	64-bit signless integer
`keys`	32-bit signless integer
`continuation_operands`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.task.call` (::talos::schedule::NativeTaskCallOp)¶

Transfer the current logical process into a task activation

Syntax:

operation ::= `schedule.task.call` $callee `(` $values `)` `arguments`
              $argument_count `to` $continuation attr-dict `:` type($values)

The argument prefix initializes the callee activation. The remaining operands are forwarded to the caller continuation after the task returns. Output destinations are explicit reference arguments in the callee signature, so a suspended task never retains native caller addresses.

Traits: Terminator

Interfaces: BranchOpInterface, MemoryEffectOpInterface (MemoryEffectOpInterface), SymbolUserOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`callee`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute
`argument_count`	::mlir::IntegerAttr	64-bit signless integer attribute
`site`	::talos::schedule::ContinuationSiteAttr

Operands:¶

Operand	Description
`values`	variadic of any type

Successors:¶

Successor	Description
`continuation`	any successor

`schedule.time` (::talos::schedule::NativeTimeOp)¶

Syntax:

operation ::= `schedule.time` $time attr-dict

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`time`	target-independent scaled simulation time

Results:¶

Result	Description
`result`	64-bit signless integer

`schedule.transfer.activation` (::talos::schedule::TransferActivationOp)¶

One ordered continuous copy activation and its source wait

Syntax:

operation ::= `schedule.transfer.activation` operands attr-dict `:` functional-type(operands, results)

IEEE 1800-2023 4.9.1, 4.9.6, 9.4.2 and 10.6.2. Binds an original process to a continuous transfer between entry storage captures. The process executes initially and on each source change, in Active, retaining its identity, canonical frame, wait and publication. Source and destination remain distinct handles even when implementations are shared. A transfer samples the source, performs the complete continuous assignment (including force/release contribution), and then arms its wait. It must not be interpreted as an alias or as a final-value-only update.

signature, source, destination and capture_offsets specify the canonical capture ABI. -1 offsets identify context captures supplied by the instance. Without kernel, this actor has its own table-process entry. With kernel, it uses the shared implementation selected by Schedule optimization; representation conversion must not regroup activations.

Interfaces: SymbolUserOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`actor`	::mlir::SymbolRefAttr	symbol reference attribute
`signature`	::mlir::TypeAttr	any type attribute
`source`	::mlir::IntegerAttr	32-bit signless integer attribute
`destination`	::mlir::IntegerAttr	32-bit signless integer attribute
`capture_offsets`	::mlir::DenseI64ArrayAttr	i64 dense array attribute
`kernel`	::mlir::FlatSymbolRefAttr	flat symbol reference attribute

`schedule.transfer.kernel` (::talos::schedule::TransferKernelOp)¶

Shared implementation of ordered continuous transfers

Syntax:

operation ::= `schedule.transfer.kernel` operands attr-dict `:` functional-type(operands, results)

IEEE 1800-2023 4.9.1 and 10.3.2: code sharing preserves separate updates. Implements the transfer semantics of transfer.activation using the executing instance’s context and canonical storage captures. No storage identity, source owner, continuation ID or wait record is baked into this kernel. Each activation supplies those through its own instance and wait plan. All sharing and ABI compatibility decisions precede conversion.

Interfaces: Symbol

Attributes:¶

Attribute	MLIR Type	Description
`sym_name`	::mlir::StringAttr	string attribute
`signature`	::mlir::TypeAttr	any type attribute
`source`	::mlir::IntegerAttr	32-bit signless integer attribute
`destination`	::mlir::IntegerAttr	32-bit signless integer attribute
`capture_offsets`	::mlir::DenseI64ArrayAttr	i64 dense array attribute

`schedule.transition` (::talos::schedule::NativeTransitionOp)¶

Publish one exact scalar four-state transition

Syntax:

operation ::= `schedule.transition` operands attr-dict `:` functional-type(operands, results)

Publishes the captured old/new value and unknown planes of one store in the executing process’s current event region. The offset is relative to the static root, and width is between 1 and 64. Dynamic offsets retain their original selector semantics. source_owner identifies the original logical process, including inside a fused activation; its absence requires runtime source resolution. Publication is synchronous and may deliver observers/callbacks. It is never a final-value-only notification and may not be moved across another effect or coalesced with another occurrence.

Interfaces: MemoryEffectOpInterface (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{MemoryEffects::Read on ::mlir::SideEffects::DefaultResource, MemoryEffects::Write on ::mlir::SideEffects::DefaultResource, MemoryEffects::Read on ::talos::sim::StorageResource, MemoryEffects::Write on ::talos::sim::StorageResource, MemoryEffects::Read on ::talos::sim::SchedulerResource, MemoryEffects::Write on ::talos::sim::SchedulerResource, MemoryEffects::Read on ::talos::sim::ProcessResource, MemoryEffects::Write on ::talos::sim::ProcessResource, MemoryEffects::Read on ::talos::sim::ExternalResource, MemoryEffects::Write on ::talos::sim::ExternalResource}

Attributes:¶

Attribute	MLIR Type	Description
`static_state`	::mlir::IntegerAttr	64-bit signless integer attribute
`width`	::mlir::IntegerAttr	64-bit signless integer attribute
`source_owner`	::talos::schedule::SourceOwnerAttr

Operands:¶

Operand	Description
`context`	LLVM pointer type
`offset`	64-bit signless integer
`old_value`	64-bit signless integer
`old_unknown`	64-bit signless integer
`new_value`	64-bit signless integer
`new_unknown`	64-bit signless integer

`schedule.word.extract` (::talos::schedule::NativeWordExtractOp)¶

Extract a native word from canonical unpacked SSA storage

Syntax:

operation ::= `schedule.word.extract` $input `from` $low_bit attr-dict `:` functional-type(operands, results)

Extracts consecutive bits of a fixed unpacked array of packed elements. low_bit is a physical storage offset, with elements ordered from the declaration’s left bound. Value and unknown planes retain that order; this operation does not perform a packed cast or streaming conversion. The result has the same state domain as the element. A negative offset or a word extending past the array returns the result’s default value (all X for logic, zero for an integer). Formation proves containment.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`input`	any type
`low_bit`	signless integer

Results:¶

Result	Description
`result`	any type

`schedule.word.region` (::talos::schedule::NativeWordRegionOp)¶

Execute a proven native-width packed computation

Syntax:

operation ::= `schedule.word.region` $width $body attr-dict

Executes the enclosed non-suspending CFG once, in program order. Packed updates fit the declared maximum native word width, between 2 and 64 bits. If lane_count is nonzero, each update contains that many complete scalar elements; independent fields can retain different element widths. A zero lane_count denotes the legacy form with all updates at the declared width. Both value and unknown planes remain exact; width does not imply two-state. Formation proves bounded lane iteration, contained selectors, independent lane dataflow, and unobservable intermediate publications before replacing scalar iterations. Calls, overrides and other observation boundaries are not permitted. Conversion only removes the representation boundary; it must not rediscover eligibility or scalarize a word into individual bits. The entry block has no arguments and exits use word.yield.

Traits: RecursiveMemoryEffects

Interfaces: RegionBranchOpInterface

Attributes:¶

Attribute	MLIR Type	Description
`width`	::mlir::IntegerAttr	32-bit signless integer attribute
`lane_count`	::mlir::IntegerAttr	32-bit signless integer attribute

`schedule.word.resize_lanes` (::talos::schedule::NativeWordResizeLanesOp)¶

Resize each native storage lane without changing its bit order

Syntax:

operation ::= `schedule.word.resize_lanes` operands attr-dict `:` functional-type(operands, results)

Treats the input and result as equal-length sequences of integer lanes. Each lane is independently truncated or zero-extended. Four-state value and unknown planes undergo the same transformation, preserving X and Z. This bridges packed logical lanes and padded physical array slots without scalar memory accesses. Lowering uses LLVM vector integer conversions.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:¶

Attribute	MLIR Type	Description
`input_lane_width`	::mlir::IntegerAttr	32-bit signless integer attribute
`result_lane_width`	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:¶

Operand	Description
`input`	any type

Results:¶

Result	Description
`result`	any type

`schedule.word.reverse` (::talos::schedule::NativeWordReverseOp)¶

Reverse native elements, preserving both four-state planes

Syntax:

operation ::= `schedule.word.reverse` operands attr-dict `:` functional-type(operands, results)

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:¶

Attribute	MLIR Type	Description
`lane_width`	::mlir::IntegerAttr	32-bit signless integer attribute

Operands:¶

Operand	Description
`input`	any type

Results:¶

Result	Description
`result`	any type

`schedule.word.table` (::talos::schedule::NativeWordTableOp)¶

Evaluate an exact scalar truth table independently in each lane

Syntax:

operation ::= `schedule.word.table` operands attr-dict `:` functional-type(operands, results)

Operands and result have one common word width (2 through 64), using either integer bits or exact four-state logic. Each table index consists of each operand’s value bit followed by its unknown bit for four-state operands. Table entries supply the result’s value and unknown bits. The tables have 2^P entries, where P is the number of operand planes, at most six. This represents scalar arithmetic, comparisons and selections without allowing carries, reductions or control predicates to cross independent lanes. Conversion emits Boolean word operations, never a per-bit loop or helper.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Attributes:¶

Attribute	MLIR Type	Description
`value_table`	::mlir::IntegerAttr	arbitrary integer attribute
`unknown_table`	::mlir::IntegerAttr	arbitrary integer attribute

Operands:¶

Operand	Description
`inputs`	variadic of any type

Results:¶

Result	Description
`result`	any type

`schedule.word.view` (::talos::schedule::NativeWordViewOp)¶

View consecutive scalar array storage lanes as one packed word

Syntax:

operation ::= `schedule.word.view` operands attr-dict `:` functional-type(operands, results)

Selects a packed native word from the canonical storage of a fixed unpacked array of packed elements. low_bit is a physical storage offset: unpacked elements are ordered from the declaration’s left bound. This is a storage view, not a SystemVerilog packed cast or streaming expression. The formation pass proves containment and equal state domains. Invalid offsets produce an invalid reference, as for native reference selectors.

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), ViewLikeOpInterface

Effects: MemoryEffects::Effect{}

Operands:¶

Operand	Description
`input`	typed mutable storage handle
`low_bit`	signless integer

Results:¶

Result	Description
`result`	typed mutable storage handle

`schedule.word.yield` (::talos::schedule::NativeWordYieldOp)¶

Syntax:

operation ::= `schedule.word.yield` attr-dict

Traits: AlwaysSpeculatableImplTrait, HasParent<NativeWordRegionOp>, Terminator

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface), RegionBranchTerminatorOpInterface

Effects: MemoryEffects::Effect{}

Attributes¶

NBABatchLayoutAttr¶

Syntax:

#schedule.nba_batch_layout<
  ::mlir::FlatSymbolRefAttr,   # plan
  ::mlir::FlatSymbolRefAttr,   # value
  ::mlir::FlatSymbolRefAttr,   # unknown
  ::mlir::FlatSymbolRefAttr,   # dirty
  ::mlir::FlatSymbolRefAttr,   # summary
  ::mlir::FlatSymbolRefAttr,   # ingress
  uint64_t,   # bitCount
  uint32_t,   # rootCount
  uint32_t   # capacity
>

Parameters:¶

Parameter	C++ type	Description
plan	`::mlir::FlatSymbolRefAttr`
value	`::mlir::FlatSymbolRefAttr`
unknown	`::mlir::FlatSymbolRefAttr`
dirty	`::mlir::FlatSymbolRefAttr`
summary	`::mlir::FlatSymbolRefAttr`
ingress	`::mlir::FlatSymbolRefAttr`
bitCount	`uint64_t`
rootCount	`uint32_t`
capacity	`uint32_t`

NBACommitLayoutAttr¶

Syntax:

#schedule.nba_commit_layout<
  uint64_t,   # offset
  uint64_t,   # width
  ::mlir::FlatSymbolRefAttr,   # accumulator
  ::mlir::ArrayAttr,   # slots
  ::mlir::ArrayAttr   # consumers
>

Parameters:¶

Parameter	C++ type	Description
offset	`uint64_t`
width	`uint64_t`
accumulator	`::mlir::FlatSymbolRefAttr`
slots	`::mlir::ArrayAttr`
consumers	`::mlir::ArrayAttr`

NBAConsumerAttr¶

Syntax:

#schedule.nba_consumer<
  uint64_t,   # low
  uint64_t,   # width
  uint32_t   # bit
>

Parameters:¶

Parameter	C++ type	Description
low	`uint64_t`
width	`uint64_t`
bit	`uint32_t`

NBASlotLayoutAttr¶

Syntax:

#schedule.nba_slot_layout<
  ::mlir::FlatSymbolRefAttr,   # offset
  ::mlir::FlatSymbolRefAttr,   # value
  ::mlir::FlatSymbolRefAttr,   # unknown
  ::mlir::FlatSymbolRefAttr,   # valid
  uint64_t,   # width
  ::mlir::IntegerAttr   # constantOffset
>

Parameters:¶

Parameter	C++ type	Description
offset	`::mlir::FlatSymbolRefAttr`
value	`::mlir::FlatSymbolRefAttr`
unknown	`::mlir::FlatSymbolRefAttr`
valid	`::mlir::FlatSymbolRefAttr`
width	`uint64_t`
constantOffset	`::mlir::IntegerAttr`

CheckpointRouteAttr¶

Syntax:

#schedule.checkpoint_route<
  ::mlir::FlatSymbolRefAttr,   # fourState
  ::mlir::IntegerAttr,   # actor
  ::mlir::IntegerAttr   # continuation
>

Parameters:¶

Parameter	C++ type	Description
fourState	`::mlir::FlatSymbolRefAttr`
actor	`::mlir::IntegerAttr`
continuation	`::mlir::IntegerAttr`

ClockedSamplePlanAttr¶

Syntax:

#schedule.clocked_sample_plan<
  ::mlir::StringAttr,   # key
  ::mlir::IntegerAttr,   # id
  ::mlir::StringAttr   # hierarchy
>

Parameters:¶

Parameter	C++ type	Description
key	`::mlir::StringAttr`
id	`::mlir::IntegerAttr`
hierarchy	`::mlir::StringAttr`

GroupProofDependencyAttr¶

Syntax:

#schedule.group_proof_dependency<
  ::mlir::IntegerAttr,   # domain
  ::mlir::DenseI32ArrayAttr,   # members
  ::mlir::DenseI64ArrayAttr   # ranges
>

Parameters:¶

Parameter	C++ type	Description
domain	`::mlir::IntegerAttr`
members	`::mlir::DenseI32ArrayAttr`
ranges	`::mlir::DenseI64ArrayAttr`

KernelProofDependencyAttr¶

Syntax:

#schedule.kernel_proof_dependency<
  ::mlir::IntegerAttr,   # latch
  ::mlir::IntegerAttr,   # pendingBit
  ::mlir::DenseI64ArrayAttr   # ranges
>

Parameters:¶

Parameter	C++ type	Description
latch	`::mlir::IntegerAttr`
pendingBit	`::mlir::IntegerAttr`
ranges	`::mlir::DenseI64ArrayAttr`

NBAProofDependencyAttr¶

Syntax:

#schedule.nba_proof_dependency<
  ::mlir::IntegerAttr,   # bit
  ::mlir::DenseI64ArrayAttr   # ranges
>

Parameters:¶

Parameter	C++ type	Description
bit	`::mlir::IntegerAttr`
ranges	`::mlir::DenseI64ArrayAttr`

PathProbeRouteAttr¶

Syntax:

#schedule.path_probe_route<
  ::mlir::FlatSymbolRefAttr,   # twoState
  ::mlir::FlatSymbolRefAttr,   # probe
  ::mlir::FlatSymbolRefAttr   # checkpointProbe
>

Parameters:¶

Parameter	C++ type	Description
twoState	`::mlir::FlatSymbolRefAttr`
probe	`::mlir::FlatSymbolRefAttr`
checkpointProbe	`::mlir::FlatSymbolRefAttr`

PeriodicAliasAttr¶

Syntax:

#schedule.periodic_alias<
  uint32_t,   # sourceStaticState
  uint32_t,   # forwardingActorSlot
  uint32_t,   # forwardingContinuation
  uint32_t,   # targetStaticState
  uint64_t,   # sourceBitOffset
  uint64_t,   # targetBitOffset
  uint64_t   # driverBitOffset
>

Parameters:¶

Parameter	C++ type	Description
sourceStaticState	`uint32_t`
forwardingActorSlot	`uint32_t`
forwardingContinuation	`uint32_t`
targetStaticState	`uint32_t`
sourceBitOffset	`uint64_t`
targetBitOffset	`uint64_t`
driverBitOffset	`uint64_t`

PeriodicClockAttr¶

Syntax:

#schedule.periodic_clock<
  uint32_t,   # actorSlot
  uint32_t,   # continuation
  uint32_t,   # staticState
  uint64_t,   # bitOffset
  uint64_t,   # halfPeriod
  ::llvm::ArrayRef<uint64_t>   # coveragePoints
>

Parameters:¶

Parameter	C++ type	Description
actorSlot	`uint32_t`
continuation	`uint32_t`
staticState	`uint32_t`
bitOffset	`uint64_t`
halfPeriod	`uint64_t`
coveragePoints	`::llvm::ArrayRef<uint64_t>`

RouteProofDependencyAttr¶

Syntax:

#schedule.route_proof_dependency<
  ::mlir::DenseI64ArrayAttr,   # ranges
  ::mlir::IntegerAttr   # pendingBit
>

Parameters:¶

Parameter	C++ type	Description
ranges	`::mlir::DenseI64ArrayAttr`
pendingBit	`::mlir::IntegerAttr`

SourceOwnerAttr¶

Syntax:

#schedule.source_owner<
  ::mlir::IntegerAttr,   # codeUnit
  ::mlir::IntegerAttr   # continuation
>

Parameters:¶

Parameter	C++ type	Description
codeUnit	`::mlir::IntegerAttr`
continuation	`::mlir::IntegerAttr`

ClockKernelAttr¶

Syntax:

#schedule.clock_kernel<
  uint32_t,   # id
  ::talos::schedule::ClockKeyAttr   # key
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
key	`::talos::schedule::ClockKeyAttr`

ClockKernelPlanAttr¶

Stable clock-keyed native-kernel ownership plan

Syntax:

#schedule.clock_kernel_plan<
  uint32_t,   # version
  ::talos::schedule::ComputeGraphAttr,   # sourceGraph
  uint32_t,   # ownerCount
  ::mlir::ArrayAttr,   # clocks
  ::mlir::ArrayAttr,   # mergedFragments
  ::mlir::ArrayAttr   # ingress
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
sourceGraph	`::talos::schedule::ComputeGraphAttr`
ownerCount	`uint32_t`
clocks	`::mlir::ArrayAttr`
mergedFragments	`::mlir::ArrayAttr`
ingress	`::mlir::ArrayAttr`

ClockKeyAttr¶

Syntax:

#schedule.clock_key<
  ::talos::schedule::ComputeResourceKind,   # resource
  uint64_t,   # descriptor
  uint64_t,   # low
  uint64_t,   # width
  ::talos::schedule::ComputeTriggerKind   # edge
>

Parameters:¶

Parameter	C++ type	Description
resource	`::talos::schedule::ComputeResourceKind`	an enum of type ComputeResourceKind
descriptor	`uint64_t`
low	`uint64_t`
width	`uint64_t`
edge	`::talos::schedule::ComputeTriggerKind`	an enum of type ComputeTriggerKind

ComputeEdgeAttr¶

Syntax:

#schedule.edge<
  uint32_t,   # source
  uint32_t,   # target
  ::talos::schedule::ComputeEdgeKind,   # kind
  ::talos::schedule::ComputeEffectAttr   # resource
>

Parameters:¶

Parameter	C++ type	Description
source	`uint32_t`
target	`uint32_t`
kind	`::talos::schedule::ComputeEdgeKind`	an enum of type ComputeEdgeKind
resource	`::talos::schedule::ComputeEffectAttr`

ComputeEffectAttr¶

Syntax:

#schedule.effect<
  ::talos::schedule::ComputeEffectKind,   # effect
  ::talos::schedule::ComputeResourceKind,   # resource
  ::talos::schedule::ComputeTargetKind,   # target
  uint64_t,   # descriptor
  uint32_t,   # formal
  uint64_t,   # low
  uint64_t,   # width
  bool,   # dynamic
  bool,   # deferred
  ::talos::schedule::ComputeTriggerKind   # trigger
>

Parameters:¶

Parameter	C++ type	Description
effect	`::talos::schedule::ComputeEffectKind`	an enum of type ComputeEffectKind
resource	`::talos::schedule::ComputeResourceKind`	an enum of type ComputeResourceKind
target	`::talos::schedule::ComputeTargetKind`	an enum of type ComputeTargetKind
descriptor	`uint64_t`
formal	`uint32_t`
low	`uint64_t`
width	`uint64_t`
dynamic	`bool`
deferred	`bool`
trigger	`::talos::schedule::ComputeTriggerKind`	an enum of type ComputeTriggerKind

ComputeEventCommitAttr¶

Syntax:

#schedule.event_commit<
  uint32_t,   # id
  ::mlir::DenseI64ArrayAttr,   # sites
  ::talos::schedule::ComputeEffectAttr   # effect
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
sites	`::mlir::DenseI64ArrayAttr`
effect	`::talos::schedule::ComputeEffectAttr`

ComputeFragmentAttr¶

Syntax:

#schedule.fragment<
  uint32_t,   # id
  ::mlir::FlatSymbolRefAttr,   # function
  uint32_t,   # block
  ::talos::schedule::ComputeRegionKind,   # region
  ::talos::schedule::ComputeActionKind,   # action
  ::talos::schedule::ComputeTierKind,   # tier
  uint64_t,   # cost
  uint32_t,   # lane
  bool,   # twoState
  ::mlir::ArrayAttr   # effects
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
function	`::mlir::FlatSymbolRefAttr`
block	`uint32_t`
region	`::talos::schedule::ComputeRegionKind`	an enum of type ComputeRegionKind
action	`::talos::schedule::ComputeActionKind`	an enum of type ComputeActionKind
tier	`::talos::schedule::ComputeTierKind`	an enum of type ComputeTierKind
cost	`uint64_t`
lane	`uint32_t`
twoState	`bool`
effects	`::mlir::ArrayAttr`

ComputeFusionAttr¶

Syntax:

#schedule.fusion<
  uint32_t,   # id
  ::mlir::DenseI64ArrayAttr,   # fragments
  bool,   # interleaved
  bool   # dataflow
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
fragments	`::mlir::DenseI64ArrayAttr`
interleaved	`bool`
dataflow	`bool`

ComputeGraphAttr¶

Syntax:

#schedule.graph<
  uint32_t,   # version
  ::talos::schedule::ComputeVPIMode,   # vpi
  uint32_t,   # workers
  ::mlir::ArrayAttr,   # nodes
  ::mlir::ArrayAttr,   # edges
  ::mlir::ArrayAttr   # regions
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
vpi	`::talos::schedule::ComputeVPIMode`	an enum of type ComputeVPIMode
workers	`uint32_t`
nodes	`::mlir::ArrayAttr`
edges	`::mlir::ArrayAttr`
regions	`::mlir::ArrayAttr`

ComputeGroupAttr¶

Syntax:

#schedule.group<
  ::mlir::DenseI64ArrayAttr,   # fragments
  ::talos::schedule::ComputeScheduleKind,   # schedule
  ::mlir::ArrayAttr   # feedback
>

Parameters:¶

Parameter	C++ type	Description
fragments	`::mlir::DenseI64ArrayAttr`
schedule	`::talos::schedule::ComputeScheduleKind`	an enum of type ComputeScheduleKind
feedback	`::mlir::ArrayAttr`

ComputeKernelAttr¶

Syntax:

#schedule.kernel<
  uint32_t,   # id
  ::talos::schedule::ComputeRegionKind,   # region
  ::talos::schedule::ComputeScheduleKind,   # schedule
  uint32_t,   # lane
  uint64_t,   # cost
  bool,   # loweringReady
  ::mlir::DenseI64ArrayAttr   # fragments
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
region	`::talos::schedule::ComputeRegionKind`	an enum of type ComputeRegionKind
schedule	`::talos::schedule::ComputeScheduleKind`	an enum of type ComputeScheduleKind
lane	`uint32_t`
cost	`uint64_t`
loweringReady	`bool`
fragments	`::mlir::DenseI64ArrayAttr`

ComputeNBACommitAttr¶

Syntax:

#schedule.nba_commit<
  uint32_t,   # id
  ::mlir::DenseI64ArrayAttr,   # slots
  ::mlir::DenseI64ArrayAttr,   # accumulatorSites
  ::mlir::DenseI64ArrayAttr,   # frontierSites
  ::talos::schedule::ComputeEffectAttr   # effect
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
slots	`::mlir::DenseI64ArrayAttr`
accumulatorSites	`::mlir::DenseI64ArrayAttr`
frontierSites	`::mlir::DenseI64ArrayAttr`
effect	`::talos::schedule::ComputeEffectAttr`

ComputeRegionAttr¶

Syntax:

#schedule.region<
  ::talos::schedule::ComputeRegionKind,   # kind
  ::mlir::ArrayAttr   # groups
>

Parameters:¶

Parameter	C++ type	Description
kind	`::talos::schedule::ComputeRegionKind`	an enum of type ComputeRegionKind
groups	`::mlir::ArrayAttr`

ContinuationSiteAttr¶

Syntax:

#schedule.continuation<
  uint32_t   # id
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`

EventSiteAttr¶

Syntax:

#schedule.event_site<
  uint64_t,   # id
  uint32_t,   # commit
  ::talos::schedule::TimingSiteAttr   # timing
>

Parameters:¶

Parameter	C++ type	Description
id	`uint64_t`
commit	`uint32_t`
timing	`::talos::schedule::TimingSiteAttr`

FragmentABIAttr¶

Syntax:

#schedule.fragment_abi<
  uint32_t,   # version
  ::mlir::DenseI64ArrayAttr   # fragments
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
fragments	`::mlir::DenseI64ArrayAttr`

InductiveRootAttr¶

Syntax:

#schedule.inductive_root<
  ::talos::schedule::ComputeResourceKind,   # resource
  uint64_t   # descriptor
>

Parameters:¶

Parameter	C++ type	Description
resource	`::talos::schedule::ComputeResourceKind`	an enum of type ComputeResourceKind
descriptor	`uint64_t`

KernelIngressAttr¶

Syntax:

#schedule.kernel_ingress<
  uint32_t,   # clock
  uint32_t,   # owner
  uint32_t,   # bit
  uint32_t   # fragment
>

Parameters:¶

Parameter	C++ type	Description
clock	`uint32_t`
owner	`uint32_t`
bit	`uint32_t`
fragment	`uint32_t`

MergedFragmentAttr¶

Syntax:

#schedule.merged_fragment<
  uint32_t,   # id
  uint32_t,   # owner
  uint32_t,   # bit
  bool,   # shared
  bool,   # loweringReady
  ::mlir::DenseI64ArrayAttr   # fragments
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
owner	`uint32_t`
bit	`uint32_t`
shared	`bool`
loweringReady	`bool`
fragments	`::mlir::DenseI64ArrayAttr`

NBASiteAttr¶

Syntax:

#schedule.nba_site<
  uint64_t,   # id
  uint32_t,   # commit
  ::talos::schedule::ComputeNBAStorageKind,   # storage
  ::talos::schedule::TimingSiteAttr   # timing
>

Parameters:¶

Parameter	C++ type	Description
id	`uint64_t`
commit	`uint32_t`
storage	`::talos::schedule::ComputeNBAStorageKind`	an enum of type ComputeNBAStorageKind
timing	`::talos::schedule::TimingSiteAttr`

PhysicalTriggerAttr¶

Syntax:

#schedule.physical_trigger<
  ::talos::schedule::ComputeResourceKind,   # resource
  uint64_t,   # descriptor
  uint64_t,   # low
  uint64_t,   # width
  ::talos::schedule::ComputeTriggerKind   # edge
>

Parameters:¶

Parameter	C++ type	Description
resource	`::talos::schedule::ComputeResourceKind`	an enum of type ComputeResourceKind
descriptor	`uint64_t`
low	`uint64_t`
width	`uint64_t`
edge	`::talos::schedule::ComputeTriggerKind`	an enum of type ComputeTriggerKind

ScheduledKernelAttr¶

Syntax:

#schedule.scheduled_kernel<
  uint32_t,   # id
  uint32_t,   # owner
  uint32_t,   # readyBit
  ::talos::schedule::SchedulerTierKind,   # tier
  ::talos::schedule::ComputeRegionKind,   # region
  ::talos::schedule::ComputeScheduleKind,   # schedule
  bool,   # shared
  bool,   # loweringReady
  bool,   # twoStateEligible
  ::mlir::ArrayAttr,   # promotionRoots
  ::mlir::DenseI64ArrayAttr   # fragments
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
owner	`uint32_t`
readyBit	`uint32_t`
tier	`::talos::schedule::SchedulerTierKind`	an enum of type SchedulerTierKind
region	`::talos::schedule::ComputeRegionKind`	an enum of type ComputeRegionKind
schedule	`::talos::schedule::ComputeScheduleKind`	an enum of type ComputeScheduleKind
shared	`bool`
loweringReady	`bool`
twoStateEligible	`bool`
promotionRoots	`::mlir::ArrayAttr`
fragments	`::mlir::DenseI64ArrayAttr`

ScheduledRootAttr¶

Syntax:

#schedule.scheduled_root<
  ::talos::schedule::ComputeResourceKind,   # resource
  uint64_t,   # descriptor
  uint64_t,   # low
  uint64_t,   # width
  uint32_t,   # owner
  ::talos::schedule::SchedulerTierKind   # tier
>

Parameters:¶

Parameter	C++ type	Description
resource	`::talos::schedule::ComputeResourceKind`	an enum of type ComputeResourceKind
descriptor	`uint64_t`
low	`uint64_t`
width	`uint64_t`
owner	`uint32_t`
tier	`::talos::schedule::SchedulerTierKind`	an enum of type SchedulerTierKind

SchedulerIngressAttr¶

Syntax:

#schedule.scheduler_ingress<
  uint32_t,   # trigger
  uint32_t,   # owner
  uint32_t,   # readyBit
  uint32_t   # fragment
>

Parameters:¶

Parameter	C++ type	Description
trigger	`uint32_t`
owner	`uint32_t`
readyBit	`uint32_t`
fragment	`uint32_t`

StaticActorRootAttr¶

One actor’s dependency on a fixed packed root

Syntax:

#schedule.static_actor_root<
  ::mlir::FlatSymbolRefAttr,   # function
  uint64_t,   # descriptor
  bool,   # read
  bool   # write
>

Parameters:¶

Parameter	C++ type	Description
function	`::mlir::FlatSymbolRefAttr`
descriptor	`uint64_t`
read	`bool`
write	`bool`

StaticSpecializationAttr¶

Revision-coupled direct-state and fixed-root NBA plan

Syntax:

#schedule.static_specialization<
  uint32_t,   # version
  uint32_t,   # maxPackedWidth
  ::talos::schedule::ComputeGraphAttr,   # sourceGraph
  ::mlir::ArrayAttr,   # roots
  ::mlir::ArrayAttr,   # actorRoots
  ::mlir::DenseI64ArrayAttr   # nbaRoots
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
maxPackedWidth	`uint32_t`
sourceGraph	`::talos::schedule::ComputeGraphAttr`
roots	`::mlir::ArrayAttr`
actorRoots	`::mlir::ArrayAttr`
nbaRoots	`::mlir::DenseI64ArrayAttr`

StaticStateRootAttr¶

One fixed storage root selected for static specialization

Syntax:

#schedule.static_state_root<
  uint64_t,   # descriptor
  uint32_t,   # width
  bool,   # direct
  bool,   # guarded
  bool   # nba
>

Parameters:¶

Parameter	C++ type	Description
descriptor	`uint64_t`
width	`uint32_t`
direct	`bool`
guarded	`bool`
nba	`bool`

StaticSuperstepAttr¶

Verified-graph fixed-actor clean AOT superstep candidate

Syntax:

#schedule.static_superstep<
  uint32_t,   # version
  ::talos::schedule::ComputeGraphAttr,   # sourceGraph
  ::mlir::ArrayAttr   # actors
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
sourceGraph	`::talos::schedule::ComputeGraphAttr`
actors	`::mlir::ArrayAttr`

ThreeTierScheduleAttr¶

Exclusive physical-trigger and fine-kernel ownership plan

Syntax:

#schedule.three_tier_schedule<
  uint32_t,   # version
  ::talos::schedule::ComputeGraphAttr,   # sourceGraph
  uint32_t,   # ownerCount
  ::mlir::ArrayAttr,   # triggers
  ::mlir::ArrayAttr,   # kernels
  ::mlir::ArrayAttr,   # roots
  ::mlir::ArrayAttr   # ingress
>

Parameters:¶

Parameter	C++ type	Description
version	`uint32_t`
sourceGraph	`::talos::schedule::ComputeGraphAttr`
ownerCount	`uint32_t`
triggers	`::mlir::ArrayAttr`
kernels	`::mlir::ArrayAttr`
roots	`::mlir::ArrayAttr`
ingress	`::mlir::ArrayAttr`

TimingSiteAttr¶

Syntax:

#schedule.timing_site<
  uint64_t,   # id
  ::talos::schedule::ComputeTimingKind   # kind
>

Parameters:¶

Parameter	C++ type	Description
id	`uint64_t`
kind	`::talos::schedule::ComputeTimingKind`	an enum of type ComputeTimingKind

TriggerGroupAttr¶

Syntax:

#schedule.trigger_group<
  uint32_t,   # id
  ::talos::schedule::PhysicalTriggerAttr   # key
>

Parameters:¶

Parameter	C++ type	Description
id	`uint32_t`
key	`::talos::schedule::PhysicalTriggerAttr`

Enums¶

AssertionControlAction¶

Simulation assertion control action

Cases:¶

Symbol	Value	String
Lock	`1`	lock
Unlock	`2`	unlock
On	`3`	on
Off	`4`	off
Kill	`5`	kill
PassOn	`6`	pass_on
PassOff	`7`	pass_off
FailOn	`8`	fail_on
FailOff	`9`	fail_off
NonvacuousOn	`10`	nonvacuous_on
VacuousOff	`11`	vacuous_off

AssocKeyKind¶

Simulation assoc key kind

Cases:¶

Symbol	Value	String
Unsigned	`1`	unsigned
Signed	`2`	signed
String	`3`	string
Class	`4`	class
Process	`5`	process
Wildcard	`6`	wildcard
Element	`7`	element

AssocTraversalDirection¶

Simulation assoc traversal direction

Cases:¶

Symbol	Value	String
Forward	`1`	forward
Backward	`4294967295`	backward

BinaryKind¶

Normalized four-state binary operation

Cases:¶

Symbol	Value	String
Add	`0`	add
Sub	`1`	sub
Mul	`2`	mul
UDiv	`3`	udiv
SDiv	`4`	sdiv
UMod	`5`	umod
SMod	`6`	smod
And	`7`	and
Or	`8`	or
Xor	`9`	xor
Xnor	`10`	xnor

BlockEventKind¶

Simulation block event kind

Cases:¶

Symbol	Value	String
Begin	`0`	begin
End	`1`	end

BooleanMinimizationScope¶

Minimized property operand

Cases:¶

Symbol	Value	String
Antecedent	`0`	antecedent
Consequent	`1`	consequent
Property	`2`	property

CaptureKind¶

Entry argument binding kind

Cases:¶

Symbol	Value	String
Context	`0`	context
Formal	`1`	formal
Value	`2`	value
Storage	`3`	storage
Net	`4`	net
Driver	`5`	driver
Event	`6`	event

CompareKind¶

Normalized comparison operation

Cases:¶

Symbol	Value	String
Eq	`0`	eq
Ne	`1`	ne
CaseEq	`2`	case_eq
CaseNe	`3`	case_ne
ULT	`4`	ult
ULE	`5`	ule
UGT	`6`	ugt
UGE	`7`	uge
SLT	`8`	slt
SLE	`9`	sle
SGT	`10`	sgt
SGE	`11`	sge
WildEq	`12`	wild_eq
WildNe	`13`	wild_ne
CaseZEq	`14`	casez_eq
CaseXZEq	`15`	casexz_eq

ComputeActionKind¶

Fragment terminal action

Cases:¶

Symbol	Value	String
Continue	`0`	continue
SuspendDelay	`1`	suspend_delay
SuspendChange	`2`	suspend_change
SuspendEdge	`3`	suspend_edge
SuspendAny	`4`	suspend_any
SuspendEvent	`5`	suspend_event
SuspendAwait	`6`	suspend_await
SuspendJoin	`7`	suspend_join
Terminate	`8`	terminate
TaskCall	`9`	task_call
SuspendChildren	`10`	suspend_children
SuspendObserve	`11`	suspend_observe
ProcessControl	`12`	process_control
SuspendMailbox	`13`	suspend_mailbox
SuspendSemaphore	`14`	suspend_semaphore

ComputeEdgeKind¶

Compute-graph edge kind

Cases:¶

Symbol	Value	String
ProcessOrder	`0`	process_order
Resume	`1`	resume
Spawn	`2`	spawn
Sensitivity	`3`	sensitivity
NBAStage	`4`	nba_stage
NBAActivate	`5`	nba_activate
Conflict	`6`	conflict
DeferredStage	`7`	deferred_stage
DeferredActivate	`8`	deferred_activate

ComputeEffectKind¶

Compute-graph effect kind

Cases:¶

Symbol	Value	String
Read	`0`	read
Write	`1`	write
Drive	`2`	drive
Watch	`3`	watch
NBA	`4`	nba
Trigger	`5`	trigger

ComputeNBAStorageKind¶

Generated NBA staging policy

Cases:¶

Symbol	Value	String
FixedSlot	`0`	fixed_slot
RootAccumulator	`1`	root_accumulator
DynamicFrontier	`2`	dynamic_frontier

ComputeObservabilityKind¶

VPI state observability

Cases:¶

Symbol	Value	String
Invisible	`0`	invisible
SafePoint	`1`	safe_point
ExternallyWritable	`2`	externally_writable

ComputeRegionKind¶

Simulation event-region kind

Cases:¶

Symbol	Value	String
Active	`0`	active
NBA	`1`	nba
Observed	`2`	observed
Reactive	`3`	reactive
Postponed	`4`	postponed

ComputeResourceKind¶

Compute-graph resource kind

Cases:¶

Symbol	Value	String
Unknown	`0`	unknown
Storage	`1`	storage
Net	`2`	net
Event	`3`	event
Local	`4`	local

ComputeScheduleKind¶

Compute-group execution mode

Cases:¶

Symbol	Value	String
Acyclic	`0`	acyclic
ControlLoop	`1`	control_loop
Convergence	`2`	convergence

ComputeTargetKind¶

Compute-effect target kind

Cases:¶

Symbol	Value	String
Unknown	`0`	unknown
Descriptor	`1`	descriptor
Formal	`2`	formal
Local	`3`	local

ComputeTierKind¶

Fragment implementation tier

Cases:¶

Symbol	Value	String
Native	`0`	native
Bytecode	`1`	bytecode
Generated	`2`	generated

ComputeTimingKind¶

Compiled timing-site kind

Cases:¶

Symbol	Value	String
Calendar	`0`	calendar
DeadlineSlot	`1`	deadline_slot
DelayedNBA	`2`	delayed_nba
DelayedEvent	`3`	delayed_event

ComputeTriggerKind¶

Compute-graph trigger kind

Cases:¶

Symbol	Value	String
None	`0`	none
Change	`1`	change
Posedge	`2`	posedge
Negedge	`3`	negedge
Both	`4`	both
Event	`5`	event

ComputeVPIMode¶

VPI compilation mode

Cases:¶

Symbol	Value	String
Off	`0`	off
Read	`1`	read
Full	`2`	full

ContainerKind¶

Simulation container kind

Cases:¶

Symbol	Value	String
DynamicArray	`1`	dynamic_array
Queue	`2`	queue

CoveragePointKind¶

Simulation coverage point kind

Cases:¶

Symbol	Value	String
Line	`0`	line
Assertion	`1`	assertion

CovergroupInstanceOptionKind¶

Functional-coverage option

Cases:¶

Symbol	Value	String
Weight	`1`	weight
Goal	`2`	goal
Comment	`3`	comment
AtLeast	`4`	at_least
MergeInstances	`5`	merge_instances
CrossNumPrintMissing	`6`	cross_num_print_missing
DistributeFirst	`7`	distribute_first
AutoBinMax	`8`	auto_bin_max
DetectOverlap	`9`	detect_overlap
PerInstance	`10`	per_instance
GetInstCoverage	`11`	get_inst_coverage
CrossRetainAutoBins	`12`	cross_retain_auto_bins
Name	`13`	name

DumpPortsAction¶

EVCD session control action

Cases:¶

Symbol	Value	String
Off	`0`	off
On	`1`	on
All	`2`	all
Flush	`3`	flush
Limit	`4`	limit

EdgeKind¶

Suspension edge kind

Cases:¶

Symbol	Value	String
Change	`0`	change
Posedge	`1`	posedge
Negedge	`2`	negedge
Both	`3`	both

ElementFlags¶

Simulation element flags

Cases:¶

Symbol	Value	String
None	`0`	none
FourState	`1`	four_state
Signed	`2`	signed

ElementKind¶

Simulation element kind

Cases:¶

Symbol	Value	String
Bits	`1`	bits
Logic	`2`	logic
Real	`3`	real
ClassHandle	`4`	class_handle
String	`5`	string
ContainerHandle	`6`	container_handle
Aggregate	`7`	aggregate
Event	`8`	event

EntryKind¶

Simulation code-unit kind

Cases:¶

Symbol	Value	String
RootInitializer	`0`	root_initializer
Initial	`1`	initial
Final	`2`	final
Always	`3`	always
AlwaysComb	`4`	always_comb
AlwaysFF	`5`	always_ff
AlwaysLatch	`6`	always_latch
Continuous	`7`	continuous
Function	`8`	function
PortInput	`9`	port_input
PortOutput	`10`	port_output
PortInitialize	`11`	port_initialize
Task	`12`	task
Fork	`13`	fork
Observer	`14`	observer

EventRegion¶

IEEE executable event-region queue

Cases:¶

Symbol	Value	String
Preponed	`0`	preponed
PreActive	`1`	pre_active
Active	`2`	active
Inactive	`3`	inactive
PreNBA	`4`	pre_nba
NBA	`5`	nba
PostNBA	`6`	post_nba
PreObserved	`7`	pre_observed
Observed	`8`	observed
PostObserved	`9`	post_observed
Reactive	`10`	reactive
ReInactive	`11`	re_inactive
PreReNBA	`12`	pre_re_nba
ReNBA	`13`	re_nba
PostReNBA	`14`	post_re_nba
PrePostponed	`15`	pre_postponed
Postponed	`16`	postponed

ExecutionDomain¶

Procedural scheduling domain

Cases:¶

Symbol	Value	String
Design	`0`	design
Program	`1`	program

FormalDirection¶

Subroutine formal argument direction

Cases:¶

Symbol	Value	String
In	`0`	in
Out	`1`	out
InOut	`2`	inout
Ref	`3`	ref

IntegerExpressionKind¶

Integer return summary node

Cases:¶

Symbol	Value	String
Constant	`0`	constant
Argument	`1`	argument
Identity	`2`	identity
SExt	`3`	sext
ZExt	`4`	zext
Trunc	`5`	trunc
Add	`6`	add
Sub	`7`	sub
Mul	`8`	mul
And	`9`	and
Or	`10`	or
Xor	`11`	xor

JoinKind¶

Process join mode

Cases:¶

Symbol	Value	String
All	`0`	all
Any	`1`	any

Lifetime¶

Simulation object lifetime

Cases:¶

Symbol	Value	String
Automatic	`0`	automatic
Static	`1`	static
Design	`2`	design

LogicalKind¶

Four-state logical operation

Cases:¶

Symbol	Value	String
And	`0`	and
Or	`1`	or

MailboxWaitKind¶

Mailbox readiness predicate

Cases:¶

Symbol	Value	String
NotEmpty	`0`	not_empty
NotFull	`1`	not_full

ManagedRootMode¶

Managed root classification

Cases:¶

Symbol	Value	String
Exact	`0`	exact
Candidate	`1`	candidate

ManagedWatchKind¶

Managed mutation dependency

Cases:¶

Symbol	Value	String
Field	`1`	field
ContainerSize	`2`	container_size

MemberVisibility¶

Class member visibility

Cases:¶

Symbol	Value	String
Public	`0`	public
Protected	`1`	protected
Local	`2`	local

NativeSchedulerMode¶

Native scheduling policy

Cases:¶

Symbol	Value	String
Auto	`0`	auto
Generic	`1`	generic
AOT	`2`	aot
Eval	`3`	eval

NetResolutionKind¶

Supported net resolution kind

Cases:¶

Symbol	Value	String
Wire	`0`	wire
Tri	`1`	tri
UWire	`2`	uwire
WAnd	`3`	wand
WOr	`4`	wor
Tri0	`5`	tri0
Tri1	`6`	tri1
Supply0	`7`	supply0
Supply1	`8`	supply1
TriReg	`9`	trireg

PortDirection¶

Elaborated module-port direction

Cases:¶

Symbol	Value	String
Input	`0`	input
Output	`1`	output
InOut	`2`	inout

ProcessControlKind¶

Process object control kind

Cases:¶

Symbol	Value	String
Kill	`0`	kill
Suspend	`1`	suspend
Resume	`2`	resume

Radix¶

Simulation radix

Cases:¶

Symbol	Value	String
Binary	`2`	binary
Octal	`8`	octal
Decimal	`10`	decimal
Hex	`16`	hex

RandomConstraintBlockReferenceKind¶

Constraint template mode-state root

Cases:¶

Symbol	Value	String
ObjectBlock	`0`	object_block
Storage	`1`	storage

RandomDistribution¶

Simulation random distribution

Cases:¶

Symbol	Value	String
Uniform	`0`	uniform
Normal	`1`	normal
Exponential	`2`	exponential
Poisson	`3`	poisson
ChiSquare	`4`	chi_square
T	`5`	t
Erlang	`6`	erlang

RandomValueReferenceKind¶

Symbolic random-constraint value root

Cases:¶

Symbol	Value	String
ObjectField	`0`	object_field
Storage	`1`	storage

RandomVariableKind¶

Direct packed random class-property kind

Cases:¶

Symbol	Value	String
Rand	`1`	rand
RandC	`2`	randc

ReductionKind¶

Normalized four-state reduction

Cases:¶

Symbol	Value	String
And	`0`	and
Or	`1`	or
Xor	`2`	xor
Nand	`3`	nand
Nor	`4`	nor
Xnor	`5`	xnor

SchedulerTierKind¶

Generated scheduler ownership tier

Cases:¶

Symbol	Value	String
Tier1	`1`	tier1
Tier2	`2`	tier2
Tier3	`3`	tier3

ShiftKind¶

Four-state shift operation

Cases:¶

Symbol	Value	String
Left	`0`	left
Right	`1`	right
RightArith	`2`	right_arith

StochasticQueueAction¶

Simulation stochastic queue action

Cases:¶

Symbol	Value	String
Initialize	`0`	initialize
Add	`1`	add
Remove	`2`	remove
Full	`3`	full
Exam	`4`	exam

Strength¶

Signal strength scale position

Cases:¶

Symbol	Value	String
HighZ	`0`	highz
Small	`1`	small
Medium	`2`	medium
Weak	`3`	weak
Large	`4`	large
Pull	`5`	pull
Strong	`6`	strong
Supply	`7`	supply

TimingPathConditionKind¶

Module path condition

Cases:¶

Symbol	Value	String
Unconditional	`0`	none
If	`1`	if
IfNone	`2`	ifnone

UnaryKind¶

Normalized four-state unary operation

Cases:¶

Symbol	Value	String
Plus	`0`	plus
Negate	`1`	negate
BitNot	`2`	bit_not
LogicalNot	`3`	logical_not

UnitArgumentKind¶

Frozen unit argument binding role

Cases:¶

Symbol	Value	String
Direct	`0`	direct
LValueOnly	`1`	lvalue_only
FormalLocal	`2`	formal_local
CopyOutDestination	`3`	copy_out_destination

VPIIODirection¶

Source IO-declaration direction

Cases:¶

Symbol	Value	String
Undefined	`0`	undefined
Input	`1`	input
Output	`2`	output
InOut	`3`	inout
Mixed	`4`	mixed
None	`5`	none
Ref	`6`	ref

VPIObjectBackingKind¶

Physical descriptor backing a VPI anchor

Cases:¶

Symbol	Value	String
Scope	`0`	scope
Class	`1`	class
CodeUnit	`2`	code_unit
Net	`3`	net
Storage	`4`	storage

VPIObjectRefKind¶

Stable VPI relation endpoint identity

Cases:¶

Symbol	Value	String
Statement	`0`	statement
Storage	`1`	storage
Net	`2`	net
NetIdentity	`3`	net_identity
Port	`4`	port
Symbol	`5`	symbol
DefinitionMember	`6`	definition_member

VPIRelationMode¶

VPI relation access mode

Cases:¶

Symbol	Value	String
Handle	`0`	handle
Iterate	`1`	iterate

VPIStatementSourceKind¶

VPI statement-relation source kind

Cases:¶

Symbol	Value	String
Scope	`0`	scope
CodeUnit	`1`	code_unit
Statement	`2`	statement
Anchor	`3`	anchor

VPITypeKind¶

Source-semantic VPI reflection type category

Cases:¶

Symbol	Value	String
Unknown	`0`	unknown
GenericIntegral	`1`	generic_integral
Bit	`2`	bit
Logic	`3`	logic
Reg	`4`	reg
Byte	`5`	byte
ShortInt	`6`	shortint
Int	`7`	int
LongInt	`8`	longint
Integer	`9`	integer
Enum	`10`	enum
Time	`11`	time
ShortReal	`12`	shortreal
Real	`13`	real
Realtime	`14`	realtime
String	`15`	string
Chandle	`16`	chandle
PackedArray	`17`	packed_array
UnpackedArray	`18`	unpacked_array
PackedStruct	`19`	packed_struct
UnpackedStruct	`20`	unpacked_struct
PackedUnion	`21`	packed_union
UnpackedUnion	`22`	unpacked_union
DynamicArray	`23`	dynamic_array
Queue	`24`	queue
AssocArray	`25`	assoc_array
Class	`26`	class
VirtualInterface	`27`	virtual_interface
Event	`28`	event
PackedOpenArray	`29`	packed_open_array
UnpackedOpenArray	`30`	unpacked_open_array
Process	`31`	process
Covergroup	`32`	covergroup
Mailbox	`33`	mailbox
Semaphore	`34`	semaphore
Void	`35`	void
Untyped	`36`	untyped
Sequence	`37`	sequence
Property	`38`	property

VPITypespecOrigin¶

VPI typespec inventory origin

Cases:¶

Symbol	Value	String
Typedef	`0`	typedef
Interface	`1`	interface
AnonymousEnum	`2`	anonymous_enum
ClassSpecialization	`3`	class_specialization
BuiltinClass	`4`	builtin_class
SourceDefault	`5`	source_default

‘schedule’ Dialect¶

Operations¶

schedule.bytes.address (::talos::schedule::NativeByteAddressOp)¶

Attributes:¶

Results:¶

schedule.class.method (::talos::schedule::NativeMethodOp)¶

Attributes:¶

schedule.class.virtual_task_call (::talos::schedule::NativeClassVirtualTaskCallOp)¶

Attributes:¶

Operands:¶

Successors:¶

schedule.context (::talos::schedule::NativeContextOp)¶

Operands:¶

Results:¶

schedule.control.boundary (::talos::schedule::NativeControlBoundaryOp)¶

Attributes:¶

Operands:¶

Successors:¶

schedule.execute (::talos::schedule::NativeExecuteOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.gc.collect (::talos::schedule::NativeGCCollectOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.gc.root_range.pop (::talos::schedule::NativeManagedRootPopOp)¶

Operands:¶

schedule.gc.root_range.push (::talos::schedule::NativeManagedRootPushOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.known.roots (::talos::schedule::NativeKnownRootsOp)¶

Operands:¶

Results:¶

schedule.known.value (::talos::schedule::NativeKnownValueOp)¶

Operands:¶

Results:¶

schedule.nba.batch (::talos::schedule::NativeNBABatchOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.nba.commit (::talos::schedule::NativeNBACommitOp)¶

Attributes:¶

schedule.nba.yield (::talos::schedule::NativeNBAYieldOp)¶

schedule.observer (::talos::schedule::NativeObserverOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.process.control (::talos::schedule::NativeProcessControlOp)¶

Attributes:¶

Operands:¶

Successors:¶

schedule.ready.commit (::talos::schedule::NativeReadyCommitOp)¶

Attributes:¶

Operands:¶

schedule.ready.merge (::talos::schedule::NativeReadyMergeOp)¶

Attributes:¶

Operands:¶

schedule.ready.read (::talos::schedule::NativeReadyReadOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.ready.region (::talos::schedule::NativeReadyRegionOp)¶

Results:¶

schedule.ready.update (::talos::schedule::NativeReadyUpdateOp)¶

Attributes:¶

Operands:¶

schedule.ready.yield (::talos::schedule::NativeReadyYieldOp)¶

Operands:¶

schedule.scratch (::talos::schedule::NativeScratchOp)¶

Attributes:¶

Results:¶

schedule.spawn (::talos::schedule::NativeSpawnOp)¶

Attributes:¶

Operands:¶

Results:¶

schedule.suspend.any (::talos::schedule::NativeSuspendAnyOp)¶

Attributes:¶

Operands:¶

`schedule.bytes.address` (::talos::schedule::NativeByteAddressOp)¶

`schedule.class.method` (::talos::schedule::NativeMethodOp)¶

`schedule.class.virtual_task_call` (::talos::schedule::NativeClassVirtualTaskCallOp)¶

`schedule.context` (::talos::schedule::NativeContextOp)¶

`schedule.control.boundary` (::talos::schedule::NativeControlBoundaryOp)¶

`schedule.execute` (::talos::schedule::NativeExecuteOp)¶

`schedule.gc.collect` (::talos::schedule::NativeGCCollectOp)¶

`schedule.gc.root_range.pop` (::talos::schedule::NativeManagedRootPopOp)¶

`schedule.gc.root_range.push` (::talos::schedule::NativeManagedRootPushOp)¶

`schedule.known.roots` (::talos::schedule::NativeKnownRootsOp)¶

`schedule.known.value` (::talos::schedule::NativeKnownValueOp)¶

`schedule.nba.batch` (::talos::schedule::NativeNBABatchOp)¶

`schedule.nba.commit` (::talos::schedule::NativeNBACommitOp)¶

`schedule.nba.yield` (::talos::schedule::NativeNBAYieldOp)¶

`schedule.observer` (::talos::schedule::NativeObserverOp)¶

`schedule.process.control` (::talos::schedule::NativeProcessControlOp)¶

`schedule.ready.commit` (::talos::schedule::NativeReadyCommitOp)¶

`schedule.ready.merge` (::talos::schedule::NativeReadyMergeOp)¶

`schedule.ready.read` (::talos::schedule::NativeReadyReadOp)¶

`schedule.ready.region` (::talos::schedule::NativeReadyRegionOp)¶

`schedule.ready.update` (::talos::schedule::NativeReadyUpdateOp)¶

`schedule.ready.yield` (::talos::schedule::NativeReadyYieldOp)¶

`schedule.scratch` (::talos::schedule::NativeScratchOp)¶

`schedule.spawn` (::talos::schedule::NativeSpawnOp)¶

`schedule.suspend.any` (::talos::schedule::NativeSuspendAnyOp)¶

`schedule.suspend.await` (::talos::schedule::NativeSuspendAwaitOp)¶

`schedule.suspend.change` (::talos::schedule::NativeSuspendChangeOp)¶

`schedule.suspend.children` (::talos::schedule::NativeSuspendChildrenOp)¶

`schedule.suspend.clock_set` (::talos::schedule::NativeSuspendClockSetOp)¶

`schedule.suspend.delay` (::talos::schedule::NativeSuspendDelayOp)¶

`schedule.suspend.edge` (::talos::schedule::NativeSuspendEdgeOp)¶

`schedule.suspend.edge_iff` (::talos::schedule::NativeSuspendEdgeIffOp)¶

`schedule.suspend.event` (::talos::schedule::NativeSuspendEventOp)¶

`schedule.suspend.event_order` (::talos::schedule::NativeSuspendEventOrderOp)¶

`schedule.suspend.forever` (::talos::schedule::NativeSuspendForeverOp)¶

`schedule.suspend.join` (::talos::schedule::NativeSuspendJoinOp)¶

`schedule.suspend.level` (::talos::schedule::NativeSuspendLevelOp)¶

`schedule.suspend.mailbox` (::talos::schedule::NativeSuspendMailboxOp)¶

`schedule.suspend.observe` (::talos::schedule::NativeSuspendObserveOp)¶

`schedule.suspend.semaphore` (::talos::schedule::NativeSuspendSemaphoreOp)¶

`schedule.task.call` (::talos::schedule::NativeTaskCallOp)¶

`schedule.time` (::talos::schedule::NativeTimeOp)¶

`schedule.transfer.activation` (::talos::schedule::TransferActivationOp)¶